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Searched refs:DDR_CONTROL_BASE_ADDR (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-am33xx/
H A Dhardware.h52 #define DDR_CONTROL_BASE_ADDR 0x44E11404 macro
/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Dddr.c36 (struct ddr_cmdtctrl *)DDR_CONTROL_BASE_ADDR};