Home
last modified time | relevance | path

Searched refs:DDR_BIST_TEST_START (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c210 #define DDR_BIST_TEST_START BIT(0) macro
439 writel(DDR_BIST_TEST_START, regs + DDR_REG_BIST); in ddr_tap_tuning()