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Searched refs:DDRP_MR1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-jz47xx/jz4780/
H A Dsdram.c75 writel(ddr_config->mr1, ddr_phy_regs + DDRP_MR1); in ddr_phy_init()
/openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/
H A Djz4780_dram.h57 #define DDRP_MR1 0x44 macro