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Searched refs:DDRP_DXGCR (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-jz47xx/jz4780/
H A Dsdram.c94 clrbits_le32(ddr_phy_regs + DDRP_DXGCR(i), 0x3 << 9); in ddr_phy_init()
/openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/
H A Djz4780_dram.h80 #define DDRP_DXGCR(n) (0x1c0 + ((n) * 0x40)) macro