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Searched refs:DDRPHY_SHU1_R1_B0_DQ7 (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ram/mediatek/
H A Dddr3-mt7629.c122 #define DDRPHY_SHU1_R1_B0_DQ7 0x0f1c macro
502 writel(0xf0f00, priv->ddrphy + DDRPHY_SHU1_R1_B0_DQ7); in mtk_ddr3_init()