Home
last modified time | relevance | path

Searched refs:DDRPHY_SHU1_R0_B1_DQ7 (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ram/mediatek/
H A Dddr3-mt7629.c115 #define DDRPHY_SHU1_R0_B1_DQ7 0x0e6c macro
503 writel(0xf0f00, priv->ddrphy + DDRPHY_SHU1_R0_B1_DQ7); in mtk_ddr3_init()
647 writel(0x202f2f00, priv->ddrphy + DDRPHY_SHU1_R0_B1_DQ7); in mtk_ddr3_init()
675 writel(0x202f2f00, priv->ddrphy + DDRPHY_SHU1_R0_B1_DQ7); in mtk_ddr3_init()