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Searched refs:DDRPHY_SHU1_PLL11 (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ram/mediatek/
H A Dddr3-mt7629.c103 #define DDRPHY_SHU1_PLL11 0x0dac macro
347 writel(0x0, priv->ddrphy + DDRPHY_SHU1_PLL11); in mtk_ddr3_init()