Searched refs:DDRPHY_SHU1_PLL0 (Results 1 – 1 of 1) sorted by relevance
94 #define DDRPHY_SHU1_PLL0 0x0d80 macro348 writel(0xf7f, priv->ddrphy + DDRPHY_SHU1_PLL0); in mtk_ddr3_init()