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Searched refs:DDRC_TIMING1_TWL_BIT (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/board/imgtec/ci20/
H A Dci20.c264 (6 << DDRC_TIMING1_TWR_BIT) | (5 << DDRC_TIMING1_TWL_BIT),
308 (6 << DDRC_TIMING1_TWR_BIT) | (5 << DDRC_TIMING1_TWL_BIT),
/openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/
H A Djz4780_dram.h216 #define DDRC_TIMING1_TWL_BIT 0 macro
217 #define DDRC_TIMING1_TWL_MASK (0x3f << DDRC_TIMING1_TWL_BIT)