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Searched refs:DDRC_SWSTAT (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/ddr/imx/imx8m/
H A Dddr4_init.c99 while (0 == (0x1 & reg32_read(DDRC_SWSTAT(0)))) in ddr_init()
H A Dlpddr4_init.c168 tmp = reg32_read(DDRC_SWSTAT(0)); in ddr_init()
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h485 #define DDRC_SWSTAT(X) (DDRC_IPS_BASE_ADDR(X) + 0x324) macro