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Searched refs:DDRC_ODTCFG (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dlpddr4_timing_b0.c105 { DDRC_ODTCFG(0), 0x0b060908 },
H A Dlpddr4_timing.c70 { DDRC_ODTCFG(0), 0x0b060908 },
/openbmc/u-boot/board/toradex/colibri_imx7/
H A Dimximage.cfg105 /* DDRC_ODTCFG */
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h464 #define DDRC_ODTCFG(X) (DDRC_IPS_BASE_ADDR(X) + 0x240) macro