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Searched refs:DDRC_INIT4 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dlpddr4_timing_b0.c26 { DDRC_INIT4(0), 0x00330008 },
28 { DDRC_INIT4(0), 0x00310008 },
H A Dlpddr4_timing.c24 { DDRC_INIT4(0), 0x00330008 },
26 { DDRC_INIT4(0), 0x00310008 },
/openbmc/u-boot/board/toradex/colibri_imx7/
H A Dimximage.cfg69 /* DDRC_INIT4 MR2/MR3 */
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h407 #define DDRC_INIT4(X) (DDRC_IPS_BASE_ADDR(X) + 0xe0) macro