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Searched refs:DDRC_INIT3 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dlpddr4_timing_b0.c24 { DDRC_INIT3(0), 0x00D4002D },
H A Dlpddr4_timing.c22 { DDRC_INIT3(0), 0x00D4002D },
/openbmc/u-boot/board/toradex/colibri_imx7/
H A Dimximage.cfg67 /* DDRC_INIT3 MR0/MR1 */
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h406 #define DDRC_INIT3(X) (DDRC_IPS_BASE_ADDR(X) + 0xdc) macro