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Searched refs:DDRC_FREQ1_DERATEINT (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dlpddr4_timing_b0.c80 { DDRC_FREQ1_DERATEINT(0), 0x0800000 },
130 { DDRC_FREQ1_DERATEINT(0), 0xec78f4b5 },
H A Dlpddr4_timing.c103 { DDRC_FREQ1_DERATEINT(0), 0x7e9fbeb1 },
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h534 #define DDRC_FREQ1_DERATEINT(X) (DDRC_IPS_BASE_ADDR(X) + 0x2024) macro