Home
last modified time | relevance | path

Searched refs:DDRC_DRAMTMG6 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dlpddr4_timing_b0.c38 { DDRC_DRAMTMG6(0), 0x01010007 },
H A Dlpddr4_timing.c36 { DDRC_DRAMTMG6(0), 0x01010007 },
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h419 #define DDRC_DRAMTMG6(X) (DDRC_IPS_BASE_ADDR(X) + 0x118) macro