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Searched refs:DDRC_CFG (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-jz47xx/jz4780/
H A Dsdram.c62 writel(ddrc_cfg, ddr_ctl_regs + DDRC_CFG); in ddr_cfg_init()
/openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/
H A Djz4780_dram.h16 #define DDRC_CFG 0x4 macro