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Searched refs:DDRC_BASE (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-jz47xx/jz4780/
H A Dsdram.c43 void __iomem *ddr_ctl_regs = (void __iomem *)DDRC_BASE; in ddr_cfg_init()
67 void __iomem *ddr_ctl_regs = (void __iomem *)DDRC_BASE; in ddr_phy_init()
154 void __iomem *ddr_ctl_regs = (void __iomem *)DDRC_BASE; in remap_swap()
193 void __iomem *ddr_ctl_regs = (void __iomem *)DDRC_BASE; in sdram_init()
/openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/
H A Djz4780.h13 #define DDRC_BASE 0xb3010000 macro