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Searched refs:DDR5 (Results 1 – 4 of 4) sorted by relevance

/openbmc/bmcweb/redfish-core/include/generated/enums/
H A Dprocessor.hpp49 DDR5, enumerator
135 {ProcessorMemoryType::DDR5, "DDR5"},
H A Dmemory.hpp53 DDR5, enumerator
156 {MemoryDeviceType::DDR5, "DDR5"},
/openbmc/linux/Documentation/admin-guide/perf/
H A Dalibaba_pmu.rst12 Yitian 710 employs eight DDR5/4 channels, four on each die. Each DDR5 channel
13 is independent of others to service system memory requests. And one DDR5
/openbmc/smbios-mdr/include/
H A Ddimm.hpp231 {0x22, DeviceType::DDR5}, {0x23, DeviceType::LPDDR5_SDRAM}};