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Searched refs:DDR3_WR_LVL_INT (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/
H A Demif.h530 #define DDR3_WR_LVL_INT 0x73 macro
536 #define DDR3_INC_LVL ((DDR3_WR_LVL_INT << EMIF_REG_WRLVLINC_INT_SHIFT) \