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Searched refs:DDR3_MR1_DLL_DISABLE (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/board/imgtec/ci20/
H A Dci20.c288 .mr1 = (DDR3_MR1_DIC_7 | DDR3_MR1_RTT_DIS | DDR3_MR1_DLL_DISABLE),
332 .mr1 = (DDR3_MR1_DIC_7 | DDR3_MR1_RTT_DIS | DDR3_MR1_DLL_DISABLE),
/openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/
H A Djz4780_dram.h389 #define DDR3_MR1_DLL_DISABLE 1 macro