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Searched refs:DDR3PHY_DX1DLLCR (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/include/soc/at91/
H A Dsama7-ddr.h50 #define DDR3PHY_DX1DLLCR (0x20C) /* DDR3PHY DATX8 DLL Control Register */ macro
/openbmc/linux/arch/arm/mach-at91/
H A Dpm_suspend.S190 ldr tmp1, [r3, #DDR3PHY_DX1DLLCR]
192 str tmp1, [r3, #DDR3PHY_DX1DLLCR]
244 ldr tmp1, [r3, #DDR3PHY_DX1DLLCR]
246 str tmp1, [r3, #DDR3PHY_DX1DLLCR]