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Searched refs:DDADR (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/hw/dma/
H A Dpxa2xx_dma.c79 #define DDADR 0x00 macro
167 s->chan[ch].descr = desc[DDADR]; in pxa2xx_dma_descriptor_fetch()
311 case DDADR: in pxa2xx_dma_read()
408 case DDADR: in pxa2xx_dma_write()
/openbmc/linux/Documentation/driver-api/media/drivers/
H A Dpxa_camera.rst164 +----+ +-- DMA DDADR loads DDADR_STOP
181 DMA DDADR still is DDADR_STOP
191 If DMA stops just after pxa_camera_check_link_miss() reads DDADR()
/openbmc/linux/drivers/dma/
H A Dpxa_dma.c30 #define DDADR(n) (0x0200 + ((n) << 4)) macro
227 phys_desc = ddadr = _phy_readl_relaxed(phy, DDADR); in descriptors_show()
300 seq_printf(s, "\tDDADR = %08x\n", _phy_readl_relaxed(phy, DDADR)); in chan_state_show()
511 phy_writel(chan->phy, desc->first, DDADR); in pxad_launch_chan()
H A Dmmp_pdma.c27 #define DDADR 0x0200 macro
146 u32 reg = (phy->idx << 4) + DDADR; in set_desc()
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h288 #define DDADR(x) (0x40000200 | ((x) << 4)) macro