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Searched refs:DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h4351 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK 0x00000003L macro
H A Ddce_8_0_sh_mask.h6707 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK 0x3 macro
H A Ddce_10_0_sh_mask.h15990 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK 0x3 macro
H A Ddce_11_0_sh_mask.h16210 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK 0x3 macro
H A Ddce_11_2_sh_mask.h16960 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK 0x3 macro
H A Ddce_12_0_sh_mask.h7642 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h32981 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK … macro
H A Ddcn_3_2_1_sh_mask.h39314 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK … macro
H A Ddcn_1_0_sh_mask.h27060 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK … macro
H A Ddcn_3_1_2_sh_mask.h43895 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK … macro
H A Ddcn_3_1_5_sh_mask.h41997 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK … macro
H A Ddcn_3_1_6_sh_mask.h44954 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK … macro
H A Ddcn_3_0_2_sh_mask.h31008 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK … macro
H A Ddcn_3_1_4_sh_mask.h34985 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK … macro
H A Ddcn_3_0_0_sh_mask.h35386 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK … macro
H A Ddcn_2_0_0_sh_mask.h36321 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK … macro
H A Ddcn_3_2_0_sh_mask.h39311 #define DC_I2C_DDC5_SPEED__DC_I2C_DDC5_THRESHOLD_MASK … macro