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Searched refs:DC_I2C_CONTROL__DC_I2C_DBG_REF_SEL_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h4141 #define DC_I2C_CONTROL__DC_I2C_DBG_REF_SEL_MASK 0x80000000L macro
H A Ddce_8_0_sh_mask.h6435 #define DC_I2C_CONTROL__DC_I2C_DBG_REF_SEL_MASK 0x80000000 macro
H A Ddce_10_0_sh_mask.h15710 #define DC_I2C_CONTROL__DC_I2C_DBG_REF_SEL_MASK 0x80000000 macro
H A Ddce_11_0_sh_mask.h15930 #define DC_I2C_CONTROL__DC_I2C_DBG_REF_SEL_MASK 0x80000000 macro
H A Ddce_11_2_sh_mask.h16680 #define DC_I2C_CONTROL__DC_I2C_DBG_REF_SEL_MASK 0x80000000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h16145 #define DC_I2C_CONTROL__DC_I2C_DBG_REF_SEL_MASK … macro
H A Ddcn_3_2_1_sh_mask.h39020 #define DC_I2C_CONTROL__DC_I2C_DBG_REF_SEL_MASK … macro
H A Ddcn_3_1_5_sh_mask.h41752 #define DC_I2C_CONTROL__DC_I2C_DBG_REF_SEL_MASK … macro
H A Ddcn_3_1_6_sh_mask.h44660 #define DC_I2C_CONTROL__DC_I2C_DBG_REF_SEL_MASK … macro
H A Ddcn_3_0_2_sh_mask.h30714 #define DC_I2C_CONTROL__DC_I2C_DBG_REF_SEL_MASK … macro
H A Ddcn_3_0_0_sh_mask.h35077 #define DC_I2C_CONTROL__DC_I2C_DBG_REF_SEL_MASK … macro
H A Ddcn_3_2_0_sh_mask.h39017 #define DC_I2C_CONTROL__DC_I2C_DBG_REF_SEL_MASK … macro