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Searched refs:DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h3858 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT 0x00000000 macro
H A Ddce_8_0_sh_mask.h3330 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT 0x0 macro
H A Ddce_10_0_sh_mask.h3252 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h3324 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h3574 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h9415 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h2494 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h3859 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h3644 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h1147 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro
H A Ddcn_1_0_sh_mask.h4927 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h3617 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h2516 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h4186 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h3826 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h11981 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h3930 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h3912 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h1149 #define DC_GPU_TIMER_READ__DC_GPU_TIMER_READ__SHIFT … macro