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Searched refs:DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h3799 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK 0x00001000L macro
H A Ddce_8_0_sh_mask.h4051 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK 0x1000 macro
H A Ddce_10_0_sh_mask.h3973 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK 0x1000 macro
H A Ddce_11_0_sh_mask.h4083 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK 0x1000 macro
H A Ddce_11_2_sh_mask.h4519 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK 0x1000 macro
H A Ddce_12_0_sh_mask.h10483 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21786 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK … macro
H A Ddcn_2_1_0_sh_mask.h43895 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK … macro
H A Ddcn_3_2_1_sh_mask.h41838 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK … macro
H A Ddcn_1_0_sh_mask.h41095 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK … macro
H A Ddcn_3_0_2_sh_mask.h43170 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK … macro
H A Ddcn_3_0_0_sh_mask.h49804 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK … macro
H A Ddcn_2_0_0_sh_mask.h49442 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK … macro
H A Ddcn_3_2_0_sh_mask.h41790 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_PD_DIS_MASK … macro