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Searched refs:DC_ABM1_IPCSC_COEFF_SEL__ABM1_IPCSC_COEFF_SEL_B_MASK (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h2901 #define DC_ABM1_IPCSC_COEFF_SEL__ABM1_IPCSC_COEFF_SEL_B_MASK 0x0000000fL macro
H A Ddce_8_0_sh_mask.h181 #define DC_ABM1_IPCSC_COEFF_SEL__ABM1_IPCSC_COEFF_SEL_B_MASK 0xf macro
H A Ddce_10_0_sh_mask.h181 #define DC_ABM1_IPCSC_COEFF_SEL__ABM1_IPCSC_COEFF_SEL_B_MASK 0xf macro
H A Ddce_11_0_sh_mask.h249 #define DC_ABM1_IPCSC_COEFF_SEL__ABM1_IPCSC_COEFF_SEL_B_MASK 0xf macro
H A Ddce_11_2_sh_mask.h289 #define DC_ABM1_IPCSC_COEFF_SEL__ABM1_IPCSC_COEFF_SEL_B_MASK 0xf macro
H A Ddce_12_0_sh_mask.h5569 #define DC_ABM1_IPCSC_COEFF_SEL__ABM1_IPCSC_COEFF_SEL_B_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h25130 #define DC_ABM1_IPCSC_COEFF_SEL__ABM1_IPCSC_COEFF_SEL_B_MASK … macro
H A Ddcn_2_0_0_sh_mask.h28479 #define DC_ABM1_IPCSC_COEFF_SEL__ABM1_IPCSC_COEFF_SEL_B_MASK … macro