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Searched refs:DCSR_STOPINTR (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/dma/
H A Dpxa2xx_dma.c104 #define DCSR_STOPINTR (1 << 3) macro
124 (s->chan[ch].state & DCSR_STOPINTR)) in pxa2xx_dma_update()
201 while ((ch->state & DCSR_RUN) && !(ch->state & DCSR_STOPINTR)) { in pxa2xx_dma_run()
232 ch->state |= DCSR_STOPINTR; in pxa2xx_dma_run()
250 ch->state |= DCSR_STOPINTR; in pxa2xx_dma_run()
256 ch->state |= DCSR_STOPINTR; in pxa2xx_dma_run()
367 s->chan[channel].state &= ~DCSR_STOPINTR; in pxa2xx_dma_write()
372 s->chan[channel].state &= ~DCSR_STOPINTR; in pxa2xx_dma_write()
378 s->chan[channel].state &= ~DCSR_STOPINTR; in pxa2xx_dma_write()
386 s->chan[channel].state |= DCSR_STOPINTR; in pxa2xx_dma_write()
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