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Searched refs:DCSR_STARTINTR (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/hw/dma/
H A Dpxa2xx_dma.c102 #define DCSR_STARTINTR (1 << 1) macro
141 if (s->chan[ch].state & DCSR_STARTINTR) in pxa2xx_dma_update()
181 s->chan[ch].state |= DCSR_STARTINTR; in pxa2xx_dma_descriptor_fetch()
363 DCSR_STARTINTR | DCSR_BUSERRINTR)); in pxa2xx_dma_write()
/openbmc/linux/drivers/dma/
H A Dmmp_pdma.c38 #define DCSR_STARTINTR BIT(1) /* Start Interrupt (read / write) */ macro
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h150 #define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ macro