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Searched refs:DCORE0_SYNC_MNGR_GLBL_CQ_INTR_CQ_SEC_INTR_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/accel/habanalabs/include/gaudi2/asic_reg/
H A Ddcore0_sync_mngr_glbl_masks.h81 #define DCORE0_SYNC_MNGR_GLBL_CQ_INTR_CQ_SEC_INTR_MASK 0x1 macro
/openbmc/linux/drivers/accel/habanalabs/gaudi2/
H A Dgaudi2.c8960 if (cq_intr_val & DCORE0_SYNC_MNGR_GLBL_CQ_INTR_CQ_SEC_INTR_MASK) { in gaudi2_handle_sm_err()