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Searched refs:DCLK_VOP (Results 1 – 19 of 19) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3228-cru.h56 #define DCLK_VOP 190 macro
H A Drv1108-cru.h86 #define DCLK_VOP 187 macro
H A Drk3368-cru.h86 #define DCLK_VOP 190 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drk3128-cru.h71 #define DCLK_VOP 190 macro
H A Drk3228-cru.h70 #define DCLK_VOP 190 macro
H A Drv1108-cru.h83 #define DCLK_VOP 187 macro
H A Drk3308-cru.h129 #define DCLK_VOP 125 macro
H A Drk3368-cru.h83 #define DCLK_VOP 190 macro
H A Drockchip,rv1126-cru.h221 #define DCLK_VOP 154 macro
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rv1108.c547 case DCLK_VOP: in rv1108_clk_get_rate()
592 case DCLK_VOP: in rv1108_clk_set_rate()
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drv1126.dtsi206 <&cru DCLK_VOP>,
384 clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
H A Drk322x.dtsi219 <&cru DCLK_VOP>,
664 clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3128.c331 COMPOSITE(DCLK_VOP, "dclk_vop", mux_sclk_vop_src_p, 0,
H A Dclk-rk3228.c412 MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, 0,
H A Dclk-rv1108.c442 MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3368.c450 COMPOSITE(DCLK_VOP, "dclk_vop", mux_pll_src_cpll_gpll_npll_p, 0,
H A Dclk-rk3308.c457 GATE(DCLK_VOP, "dclk_vop", "dclk_vop_mux", 0,
H A Dclk-rv1126.c753 GATE(DCLK_VOP, "dclk_vop", "dclk_vop_mux", 0,
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3368.dtsi660 <&cru DCLK_VOP>,