Home
last modified time | relevance | path

Searched refs:DCI_MEM_PWR_CNTL3__FBC_MEM_PWR_MODE_SEL_MASK (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h2581 #define DCI_MEM_PWR_CNTL3__FBC_MEM_PWR_MODE_SEL_MASK 0x1800000 macro
H A Ddce_11_0_sh_mask.h2541 #define DCI_MEM_PWR_CNTL3__FBC_MEM_PWR_MODE_SEL_MASK 0x1800000 macro
H A Ddce_11_2_sh_mask.h2763 #define DCI_MEM_PWR_CNTL3__FBC_MEM_PWR_MODE_SEL_MASK 0x1800000 macro
H A Ddce_12_0_sh_mask.h3979 #define DCI_MEM_PWR_CNTL3__FBC_MEM_PWR_MODE_SEL_MASK … macro