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Searched refs:DCIO_GSL_VSYNC_SEL_PIPE3 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_enum.h300 DCIO_GSL_VSYNC_SEL_PIPE3 = 0x3, enumerator
H A Ddce_11_0_enum.h1069 DCIO_GSL_VSYNC_SEL_PIPE3 = 0x3, enumerator
H A Ddce_11_2_enum.h1468 DCIO_GSL_VSYNC_SEL_PIPE3 = 0x3, enumerator
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega10_enum.h12007 DCIO_GSL_VSYNC_SEL_PIPE3 = 0x00000003, enumerator