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Searched refs:DCIO_DPHY_SEL__DPHY_LANE3_SEL__SHIFT (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h3344 #define DCIO_DPHY_SEL__DPHY_LANE3_SEL__SHIFT 0x6 macro
H A Ddce_11_0_sh_mask.h3422 #define DCIO_DPHY_SEL__DPHY_LANE3_SEL__SHIFT 0x6 macro
H A Ddce_11_2_sh_mask.h3676 #define DCIO_DPHY_SEL__DPHY_LANE3_SEL__SHIFT 0x6 macro
H A Ddce_12_0_sh_mask.h9505 #define DCIO_DPHY_SEL__DPHY_LANE3_SEL__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h40169 #define DCIO_DPHY_SEL__DPHY_LANE3_SEL__SHIFT … macro