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Searched refs:DCIO_DPHY_SEL__DPHY_LANE0_SEL__SHIFT (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h3338 #define DCIO_DPHY_SEL__DPHY_LANE0_SEL__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h3416 #define DCIO_DPHY_SEL__DPHY_LANE0_SEL__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h3670 #define DCIO_DPHY_SEL__DPHY_LANE0_SEL__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h9502 #define DCIO_DPHY_SEL__DPHY_LANE0_SEL__SHIFT macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h40166 #define DCIO_DPHY_SEL__DPHY_LANE0_SEL__SHIFT macro