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Searched refs:DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_2_sh_mask.h1769 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK 0x4 macro
H A Ddce_12_0_sh_mask.h2435 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h430 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK … macro
H A Ddcn_3_0_1_sh_mask.h755 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK … macro
H A Ddcn_2_1_0_sh_mask.h367 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK … macro
H A Ddcn_1_0_sh_mask.h1863 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK … macro
H A Ddcn_3_1_2_sh_mask.h660 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK … macro
H A Ddcn_3_1_5_sh_mask.h167 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK … macro
H A Ddcn_3_1_6_sh_mask.h1186 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK … macro
H A Ddcn_3_0_2_sh_mask.h480 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK … macro
H A Ddcn_3_1_4_sh_mask.h8070 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK … macro
H A Ddcn_3_0_0_sh_mask.h466 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK … macro
H A Ddcn_2_0_0_sh_mask.h485 #define DCCG_PERFMON_CNTL2__DCCG_PERF_PIXCLK1_ENABLE_MASK … macro