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Searched refs:DCCG_GATE_DISABLE_CNTL3 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dccg.h74 SR(DCCG_GATE_DISABLE_CNTL3),\
155 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_ROOT_SE0_GATE_DISABLE, mask_sh),\
156 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_ROOT_SE1_GATE_DISABLE, mask_sh),\
157 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_ROOT_SE2_GATE_DISABLE, mask_sh),\
158 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_ROOT_SE3_GATE_DISABLE, mask_sh),\
161 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_SE0_GATE_DISABLE, mask_sh),\
162 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_SE1_GATE_DISABLE, mask_sh),\
163 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_SE2_GATE_DISABLE, mask_sh),\
164 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_SE3_GATE_DISABLE, mask_sh),\
165 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_LE0_GATE_DISABLE, mask_sh),\
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_dccg.h66 SR(DCCG_GATE_DISABLE_CNTL3),\
144 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, DPSTREAMCLK_ROOT_GATE_DISABLE, mask_sh),\
145 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, DPSTREAMCLK_GATE_DISABLE, mask_sh),\
146 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_ROOT_SE0_GATE_DISABLE, mask_sh),\
147 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_ROOT_SE1_GATE_DISABLE, mask_sh),\
148 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_ROOT_SE2_GATE_DISABLE, mask_sh),\
149 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_ROOT_SE3_GATE_DISABLE, mask_sh),\
150 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_ROOT_LE0_GATE_DISABLE, mask_sh),\
151 DCCG_SF(DCCG_GATE_DISABLE_CNTL3, SYMCLK32_ROOT_LE1_GATE_DISABLE, mask_sh),\
H A Ddcn31_dccg.c124 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_enable_dpstreamclk()
134 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_disable_dpstreamclk()
186 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_enable_symclk32_se()
195 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_enable_symclk32_se()
204 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_enable_symclk32_se()
213 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_enable_symclk32_se()
239 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_disable_symclk32_se()
248 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_disable_symclk32_se()
257 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_disable_symclk32_se()
339 REG_UPDATE_2(DCCG_GATE_DISABLE_CNTL3, in dccg31_set_symclk32_le_root_clock_gating()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dccg.h290 uint32_t DCCG_GATE_DISABLE_CNTL3; member