Searched refs:DC (Results 1 – 25 of 147) sorted by relevance
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12 BIT(1): DC wakeup implemented if set18 BIT(7): The DC timer wakes up from S4 if set19 BIT(8): The DC timer wakes up from S5 if set50 wakeups if the system is on DC power.55 wakeups if the system is on DC power, respectively.89 (RW,optional) The DC alarm timer value.92 DC timer.100 (RW,optional) The DC alarm expired timer wake policy.103 DC timer.112 (RW,optional) The DC alarm status.[all …]
22 DC, enumerator45 DC, enumerator60 {PowerSupplyType::DC, "DC"},83 {InputType::DC, "DC"},
13 DC, enumerator28 {PowerSupplyType::DC, "DC"},
38 DC, enumerator69 {VoltageType::DC, "DC"},
38 This PMIC includes 4 DC/DC step-down buck regulators and 8 low-dropout46 The AS3722 includes 7 DC/DC buck convertors, 11 low-noise LDOs, a128 The Rockchip RK808 PMIC provides four buck DC-DC convertors, 8 LDOs,185 The RN5T567 is a PMIC with 4 step-down DC/DC converters, 5 LDO193 The TPS65090 is a PMIC containing several LDOs, DC to DC convertors,223 SoC. It provides 4 buck DC-DC convertors and 5 LDOs, and it is accessed230 The TPS65910 is a PMIC containing 3 buck DC-DC converters, one boost231 DC-DC converter, 8 LDOs and a RTC. This driver binds the SMPS and LDO
6 bool "AMD DC - Enable new display engine"29 bool "AMD DC support for Southern Islands ASICs"33 Choose this option to enable new AMD DC support for SI asics35 Hainan is not supported by AMD DC and it has no physical DCE6.38 bool "Enable kgdb break in DC"
14 4. DONE - Flatten all DC objects16 * Same for other DC objects28 5. DONE - Rename DC objects to align more with DRM47 * Remove DC's edid quirks and rely on DRM's quirks (add quirks if needed)56 I can't come up with a good reason why DC needs all this (except to60 doesn't slip in (i.e. if you start adding edid quirks to DC instead of85 16. Move to core SCDC helpers (I think those are new since initial DC review).97 issue with DC - other drivers, especially around DP sink handling, are equally100 19. DONE - The DC logger is still a rather sore thing, but I know that the
38 /* SY8008 DC/DC regulator on the board */47 /* SY8008 DC/DC regulator on the board, also supplying VDD-SYS */
39 - Intel VR13 DC-DC converter specifications.48 - Intel VR13 DC-DC converter specifications.
33 1100 Watt AC to DC power-factor-corrected (PFC) power supply.38 3000 Watt AC/DC power-factor-corrected (PFC) and DC-DC power supply.
50 - this file stores PWM duty cycle or DC value (fan speed) in range:61 - Select PWM of DC mode63 * 0 DC
22 The TPS546D24A is a highly integrated, non-isolated DC/DC converter capable
22 This driver supports various Lineage Compact Power Line DC/DC and AC/DC
49 can be configured to PWM output or Analogue DC output via their associated136 Works as expected. You just need to specify desired PWM/DC value (fan speed)177 - this file stores PWM duty cycle or DC value (fan speed) in range:188 - Select PWM or DC mode190 * 0 DC199 - three PWM/DC levels for each fan for Smart Fan II
31 designed for non-isolated DC/DC power applications. The devices integrate32 dedicated circuitry for DC/DC loop management with flash memory and a serial
24 Q54SJ108A2NCPG, and Q54SJ108A2NCPH 1/4 Brick DC/DC Regulated Power Module
20 LTC3815 is a Monolithic Synchronous DC/DC Step-Down Converter.
13 FE_SET_VOLTAGE - Allow setting the DC level sent to the antenna subsystem.34 This ioctl allows to set the DC voltage level sent through the antenna38 device to send a DC voltage to feed power to the LNBf. Depending on the
13 FE_ENABLE_HIGH_LNB_VOLTAGE - Select output DC level between normal LNBf voltages or higher LNBf - v…39 Select output DC level between normal LNBf voltages or higher LNBf
55 bool "QUALCOMM-DC-SCM-V1"58 QUALCOMM-DC-SCM-V1 is a Qualcomm DC-SCM V1 board which is
29 Boolean, define to enable headphone DC impedance measurement.33 DC impedance must also be enabled for AC impedance measurement.36 Define 2 DC impedance thresholds in ohms for HP output control.
24 compensate the DC offset for each L and R channel, and they are different31 minimum, impedance maximum, volume, DC offset w/o and w/ mic of each L and38 should compensate different DC offset to avoid the pop sound, and it is
54 DC Color Capabilities between DCN generations59 gamma LUT sizes. AMD DC programs some of the color correction features62 In general, the DRM CRTC color properties are programmed to DC, as follows:93 to understand how this property is mapped to AMD DC interface. See more about172 The alpha blending equation is configured from DRM to DC interface by the179 OS-agnostic component (DC).181 2. On DC interface, :c:type:`struct mpcc_blnd_cfg <mpcc_blnd_cfg>` programs the
4 drm/amd/display - Display Core (DC)10 1. **Display Core (DC)** contains the OS-agnostic components. Things like
27 Dell PERC3/DC 101E:1960:1028:049331 Dell PERC4/DC 1000:1960:1028:051839 Dell PERC 4e/DC 1000:0408:1028:0002