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Searched refs:DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h3300 #define DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK 0x00200000L macro
H A Dgfx_7_2_sh_mask.h3979 #define DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK 0x100000 macro
H A Dgfx_8_0_sh_mask.h4705 #define DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK 0x100000 macro
H A Dgfx_8_1_sh_mask.h5229 #define DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK 0x100000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h5084 #define DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK … macro
H A Dgc_9_2_1_sh_mask.h4385 #define DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK … macro
H A Dgc_9_1_sh_mask.h4556 #define DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK … macro
H A Dgc_9_4_3_sh_mask.h5582 #define DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK … macro
H A Dgc_9_4_2_sh_mask.h20478 #define DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK … macro
H A Dgc_11_0_0_sh_mask.h8009 #define DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK … macro
H A Dgc_11_0_3_sh_mask.h9615 #define DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK … macro
H A Dgc_10_1_0_sh_mask.h9376 #define DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK … macro
H A Dgc_10_3_0_sh_mask.h9555 #define DB_DEBUG3__DISABLE_HZ_TC_WRITE_COMBINE_MASK … macro