/openbmc/linux/drivers/gpu/drm/radeon/ |
H A D | avivod.h | 44 #define D1VGA_CONTROL 0x0330 macro
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_hwseq.h | 249 SR(D1VGA_CONTROL), \ 313 SR(D1VGA_CONTROL), \ 363 SR(D1VGA_CONTROL), \ 471 SR(D1VGA_CONTROL), \ 531 SR(D1VGA_CONTROL), \ 561 SR(D1VGA_CONTROL), \ 651 uint32_t D1VGA_CONTROL; member 813 HWS_SF(, D1VGA_CONTROL, D1VGA_MODE_ENABLE, mask_sh),\
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce120/ |
H A D | dce120_timing_generator.c | 418 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_MODE_ENABLE); in dce120_timing_generator_disable_vga() 419 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_TIMING_SELECT); in dce120_timing_generator_disable_vga() 421 value, 0, D1VGA_CONTROL, D1VGA_SYNC_POLARITY_SELECT); in dce120_timing_generator_disable_vga() 422 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_OVERSCAN_COLOR_EN); in dce120_timing_generator_disable_vga()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce110/ |
H A D | dce110_timing_generator.c | 1829 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_MODE_ENABLE); in dce110_timing_generator_disable_vga() 1830 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_TIMING_SELECT); in dce110_timing_generator_disable_vga() 1832 value, 0, D1VGA_CONTROL, D1VGA_SYNC_POLARITY_SELECT); in dce110_timing_generator_disable_vga() 1833 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_OVERSCAN_COLOR_EN); in dce110_timing_generator_disable_vga()
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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | gmc_v6_0.c | 794 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v6_0_get_vbios_fb_size()
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H A D | gmc_v11_0.c | 555 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v11_0_get_vbios_fb_size()
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H A D | gmc_v10_0.c | 647 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v10_0_get_vbios_fb_size()
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H A D | gmc_v7_0.c | 964 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v7_0_get_vbios_fb_size()
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H A D | gmc_v8_0.c | 1070 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v8_0_get_vbios_fb_size()
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H A D | gmc_v9_0.c | 1381 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v9_0_get_vbios_fb_size()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn316/ |
H A D | dcn316_resource.c | 719 SR(D1VGA_CONTROL), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn315/ |
H A D | dcn315_resource.c | 722 SR(D1VGA_CONTROL), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn321/ |
H A D | dcn321_resource.c | 571 SR(D1VGA_CONTROL), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
H A D | dcn314_resource.c | 731 SR(D1VGA_CONTROL), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_hw_sequencer.c | 583 REG_GET(D1VGA_CONTROL, D1VGA_MODE_ENABLE, &in_vga1_mode); in dcn10_disable_vga() 592 REG_WRITE(D1VGA_CONTROL, 0); in dcn10_disable_vga()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
H A D | dcn31_resource.c | 723 SR(D1VGA_CONTROL), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
H A D | dcn32_resource.c | 572 SR(D1VGA_CONTROL), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_hwseq.c | 265 REG_WRITE(D1VGA_CONTROL, 0); in dcn20_disable_vga()
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