1 /*
2 * arch/m68k/mvme16x/config.c
3 *
4 * Copyright (C) 1995 Richard Hirst [richard@sleepie.demon.co.uk]
5 *
6 * Based on:
7 *
8 * linux/amiga/config.c
9 *
10 * Copyright (C) 1993 Hamish Macdonald
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file README.legal in the main directory of this archive
14 * for more details.
15 */
16
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/seq_file.h>
21 #include <linux/tty.h>
22 #include <linux/clocksource.h>
23 #include <linux/console.h>
24 #include <linux/linkage.h>
25 #include <linux/init.h>
26 #include <linux/major.h>
27 #include <linux/rtc.h>
28 #include <linux/interrupt.h>
29 #include <linux/module.h>
30
31 #include <asm/bootinfo.h>
32 #include <asm/bootinfo-vme.h>
33 #include <asm/byteorder.h>
34 #include <asm/setup.h>
35 #include <asm/irq.h>
36 #include <asm/traps.h>
37 #include <asm/machdep.h>
38 #include <asm/mvme16xhw.h>
39 #include <asm/config.h>
40
41 #include "mvme16x.h"
42
43 extern t_bdid mvme_bdid;
44
45 static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
46
47 static void mvme16x_get_model(char *model);
48 extern void mvme16x_sched_init(void);
49 extern int mvme16x_hwclk (int, struct rtc_time *);
50 extern void mvme16x_reset (void);
51
52 int bcd2int (unsigned char b);
53
54
55 unsigned short mvme16x_config;
56 EXPORT_SYMBOL(mvme16x_config);
57
58
mvme16x_parse_bootinfo(const struct bi_record * bi)59 int __init mvme16x_parse_bootinfo(const struct bi_record *bi)
60 {
61 uint16_t tag = be16_to_cpu(bi->tag);
62 if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO)
63 return 0;
64 else
65 return 1;
66 }
67
mvme16x_reset(void)68 void mvme16x_reset(void)
69 {
70 pr_info("\r\n\nCalled mvme16x_reset\r\n"
71 "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
72 /* The string of returns is to delay the reset until the whole
73 * message is output. Assert reset bit in GCSR */
74 *(volatile char *)0xfff40107 = 0x80;
75 }
76
mvme16x_get_model(char * model)77 static void mvme16x_get_model(char *model)
78 {
79 p_bdid p = &mvme_bdid;
80 char suf[4];
81
82 suf[1] = p->brdsuffix[0];
83 suf[2] = p->brdsuffix[1];
84 suf[3] = '\0';
85 suf[0] = suf[1] ? '-' : '\0';
86
87 sprintf(model, "Motorola MVME%x%s", be16_to_cpu(p->brdno), suf);
88 }
89
90
mvme16x_get_hardware_list(struct seq_file * m)91 static void mvme16x_get_hardware_list(struct seq_file *m)
92 {
93 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
94
95 if (brdno == 0x0162 || brdno == 0x0172)
96 {
97 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
98
99 seq_printf (m, "VMEchip2 %spresent\n",
100 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
101 seq_printf (m, "SCSI interface %spresent\n",
102 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
103 seq_printf (m, "Ethernet i/f %spresent\n",
104 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
105 }
106 }
107
108 /*
109 * This function is called during kernel startup to initialize
110 * the mvme16x IRQ handling routines. Should probably ensure
111 * that the base vectors for the VMEChip2 and PCCChip2 are valid.
112 */
113
mvme16x_init_IRQ(void)114 static void __init mvme16x_init_IRQ (void)
115 {
116 m68k_setup_user_interrupt(VEC_USER, 192);
117 }
118
119 #define PCC2CHIP (0xfff42000)
120 #define PCCSCCMICR (PCC2CHIP + 0x1d)
121 #define PCCSCCTICR (PCC2CHIP + 0x1e)
122 #define PCCSCCRICR (PCC2CHIP + 0x1f)
123 #define PCCTPIACKR (PCC2CHIP + 0x25)
124
125 #ifdef CONFIG_EARLY_PRINTK
126
127 /**** cd2401 registers ****/
128 #define CD2401_ADDR (0xfff45000)
129
130 #define CyGFRCR (0x81)
131 #define CyCCR (0x13)
132 #define CyCLR_CHAN (0x40)
133 #define CyINIT_CHAN (0x20)
134 #define CyCHIP_RESET (0x10)
135 #define CyENB_XMTR (0x08)
136 #define CyDIS_XMTR (0x04)
137 #define CyENB_RCVR (0x02)
138 #define CyDIS_RCVR (0x01)
139 #define CyCAR (0xee)
140 #define CyIER (0x11)
141 #define CyMdmCh (0x80)
142 #define CyRxExc (0x20)
143 #define CyRxData (0x08)
144 #define CyTxMpty (0x02)
145 #define CyTxRdy (0x01)
146 #define CyLICR (0x26)
147 #define CyRISR (0x89)
148 #define CyTIMEOUT (0x80)
149 #define CySPECHAR (0x70)
150 #define CyOVERRUN (0x08)
151 #define CyPARITY (0x04)
152 #define CyFRAME (0x02)
153 #define CyBREAK (0x01)
154 #define CyREOIR (0x84)
155 #define CyTEOIR (0x85)
156 #define CyMEOIR (0x86)
157 #define CyNOTRANS (0x08)
158 #define CyRFOC (0x30)
159 #define CyRDR (0xf8)
160 #define CyTDR (0xf8)
161 #define CyMISR (0x8b)
162 #define CyRISR (0x89)
163 #define CyTISR (0x8a)
164 #define CyMSVR1 (0xde)
165 #define CyMSVR2 (0xdf)
166 #define CyDSR (0x80)
167 #define CyDCD (0x40)
168 #define CyCTS (0x20)
169 #define CyDTR (0x02)
170 #define CyRTS (0x01)
171 #define CyRTPRL (0x25)
172 #define CyRTPRH (0x24)
173 #define CyCOR1 (0x10)
174 #define CyPARITY_NONE (0x00)
175 #define CyPARITY_E (0x40)
176 #define CyPARITY_O (0xC0)
177 #define Cy_5_BITS (0x04)
178 #define Cy_6_BITS (0x05)
179 #define Cy_7_BITS (0x06)
180 #define Cy_8_BITS (0x07)
181 #define CyCOR2 (0x17)
182 #define CyETC (0x20)
183 #define CyCtsAE (0x02)
184 #define CyCOR3 (0x16)
185 #define Cy_1_STOP (0x02)
186 #define Cy_2_STOP (0x04)
187 #define CyCOR4 (0x15)
188 #define CyREC_FIFO (0x0F) /* Receive FIFO threshold */
189 #define CyCOR5 (0x14)
190 #define CyCOR6 (0x18)
191 #define CyCOR7 (0x07)
192 #define CyRBPR (0xcb)
193 #define CyRCOR (0xc8)
194 #define CyTBPR (0xc3)
195 #define CyTCOR (0xc0)
196 #define CySCHR1 (0x1f)
197 #define CySCHR2 (0x1e)
198 #define CyTPR (0xda)
199 #define CyPILR1 (0xe3)
200 #define CyPILR2 (0xe0)
201 #define CyPILR3 (0xe1)
202 #define CyCMR (0x1b)
203 #define CyASYNC (0x02)
204 #define CyLICR (0x26)
205 #define CyLIVR (0x09)
206 #define CySCRL (0x23)
207 #define CySCRH (0x22)
208 #define CyTFTC (0x80)
209
mvme16x_cons_write(struct console * co,const char * str,unsigned count)210 void mvme16x_cons_write(struct console *co, const char *str, unsigned count)
211 {
212 volatile unsigned char *base_addr = (u_char *)CD2401_ADDR;
213 volatile u_char sink;
214 u_char ier;
215 int port;
216 u_char do_lf = 0;
217 int i = 0;
218
219 /* Ensure transmitter is enabled! */
220
221 port = 0;
222 base_addr[CyCAR] = (u_char)port;
223 while (base_addr[CyCCR])
224 ;
225 base_addr[CyCCR] = CyENB_XMTR;
226
227 ier = base_addr[CyIER];
228 base_addr[CyIER] = CyTxMpty;
229
230 while (1) {
231 if (in_8(PCCSCCTICR) & 0x20)
232 {
233 /* We have a Tx int. Acknowledge it */
234 sink = in_8(PCCTPIACKR);
235 if ((base_addr[CyLICR] >> 2) == port) {
236 if (i == count) {
237 /* Last char of string is now output */
238 base_addr[CyTEOIR] = CyNOTRANS;
239 break;
240 }
241 if (do_lf) {
242 base_addr[CyTDR] = '\n';
243 str++;
244 i++;
245 do_lf = 0;
246 }
247 else if (*str == '\n') {
248 base_addr[CyTDR] = '\r';
249 do_lf = 1;
250 }
251 else {
252 base_addr[CyTDR] = *str++;
253 i++;
254 }
255 base_addr[CyTEOIR] = 0;
256 }
257 else
258 base_addr[CyTEOIR] = CyNOTRANS;
259 }
260 }
261
262 base_addr[CyIER] = ier;
263 }
264
265 #endif
266
config_mvme16x(void)267 void __init config_mvme16x(void)
268 {
269 p_bdid p = &mvme_bdid;
270 char id[40];
271 uint16_t brdno = be16_to_cpu(p->brdno);
272
273 mach_sched_init = mvme16x_sched_init;
274 mach_init_IRQ = mvme16x_init_IRQ;
275 mach_hwclk = mvme16x_hwclk;
276 mach_reset = mvme16x_reset;
277 mach_get_model = mvme16x_get_model;
278 mach_get_hardware_list = mvme16x_get_hardware_list;
279
280 /* Report board revision */
281
282 if (strncmp("BDID", p->bdid, 4))
283 {
284 pr_crit("Bug call .BRD_ID returned garbage - giving up\n");
285 while (1)
286 ;
287 }
288 /* Board type is only set by newer versions of vmelilo/tftplilo */
289 if (vme_brdtype == 0)
290 vme_brdtype = brdno;
291
292 mvme16x_get_model(id);
293 pr_info("BRD_ID: %s BUG %x.%x %02x/%02x/%02x\n", id, p->rev >> 4,
294 p->rev & 0xf, p->yr, p->mth, p->day);
295 if (brdno == 0x0162 || brdno == 0x172)
296 {
297 unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
298
299 mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA;
300
301 pr_info("MVME%x Hardware status:\n", brdno);
302 pr_info(" CPU Type 68%s040\n",
303 rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC");
304 pr_info(" CPU clock %dMHz\n",
305 rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25);
306 pr_info(" VMEchip2 %spresent\n",
307 rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
308 pr_info(" SCSI interface %spresent\n",
309 rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
310 pr_info(" Ethernet interface %spresent\n",
311 rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
312 }
313 else
314 {
315 mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401;
316 }
317 }
318
mvme16x_abort_int(int irq,void * dev_id)319 static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
320 {
321 unsigned long *new = (unsigned long *)vectors;
322 unsigned long *old = (unsigned long *)0xffe00000;
323 volatile unsigned char uc, *ucp;
324 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
325
326 if (brdno == 0x0162 || brdno == 0x172)
327 {
328 ucp = (volatile unsigned char *)0xfff42043;
329 uc = *ucp | 8;
330 *ucp = uc;
331 }
332 else
333 {
334 *(volatile unsigned long *)0xfff40074 = 0x40000000;
335 }
336 *(new+4) = *(old+4); /* Illegal instruction */
337 *(new+9) = *(old+9); /* Trace */
338 *(new+47) = *(old+47); /* Trap #15 */
339
340 if (brdno == 0x0162 || brdno == 0x172)
341 *(new+0x5e) = *(old+0x5e); /* ABORT switch */
342 else
343 *(new+0x6e) = *(old+0x6e); /* ABORT switch */
344 return IRQ_HANDLED;
345 }
346
347 static u64 mvme16x_read_clk(struct clocksource *cs);
348
349 static struct clocksource mvme16x_clk = {
350 .name = "pcc",
351 .rating = 250,
352 .read = mvme16x_read_clk,
353 .mask = CLOCKSOURCE_MASK(32),
354 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
355 };
356
357 static u32 clk_total;
358
359 #define PCC_TIMER_CLOCK_FREQ 1000000
360 #define PCC_TIMER_CYCLES (PCC_TIMER_CLOCK_FREQ / HZ)
361
362 #define PCCTCMP1 (PCC2CHIP + 0x04)
363 #define PCCTCNT1 (PCC2CHIP + 0x08)
364 #define PCCTOVR1 (PCC2CHIP + 0x17)
365 #define PCCTIC1 (PCC2CHIP + 0x1b)
366
367 #define PCCTOVR1_TIC_EN 0x01
368 #define PCCTOVR1_COC_EN 0x02
369 #define PCCTOVR1_OVR_CLR 0x04
370
371 #define PCCTIC1_INT_LEVEL 6
372 #define PCCTIC1_INT_CLR 0x08
373 #define PCCTIC1_INT_EN 0x10
374
mvme16x_timer_int(int irq,void * dev_id)375 static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
376 {
377 unsigned long flags;
378
379 local_irq_save(flags);
380 out_8(PCCTOVR1, PCCTOVR1_OVR_CLR | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN);
381 out_8(PCCTIC1, PCCTIC1_INT_EN | PCCTIC1_INT_CLR | PCCTIC1_INT_LEVEL);
382 clk_total += PCC_TIMER_CYCLES;
383 legacy_timer_tick(1);
384 local_irq_restore(flags);
385
386 return IRQ_HANDLED;
387 }
388
mvme16x_sched_init(void)389 void mvme16x_sched_init(void)
390 {
391 uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
392 int irq;
393
394 /* Using PCCchip2 or MC2 chip tick timer 1 */
395 if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, IRQF_TIMER, "timer",
396 NULL))
397 panic ("Couldn't register timer int");
398
399 out_be32(PCCTCNT1, 0);
400 out_be32(PCCTCMP1, PCC_TIMER_CYCLES);
401 out_8(PCCTOVR1, PCCTOVR1_OVR_CLR | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN);
402 out_8(PCCTIC1, PCCTIC1_INT_EN | PCCTIC1_INT_CLR | PCCTIC1_INT_LEVEL);
403
404 clocksource_register_hz(&mvme16x_clk, PCC_TIMER_CLOCK_FREQ);
405
406 if (brdno == 0x0162 || brdno == 0x172)
407 irq = MVME162_IRQ_ABORT;
408 else
409 irq = MVME167_IRQ_ABORT;
410 if (request_irq(irq, mvme16x_abort_int, 0,
411 "abort", mvme16x_abort_int))
412 panic ("Couldn't register abort int");
413 }
414
mvme16x_read_clk(struct clocksource * cs)415 static u64 mvme16x_read_clk(struct clocksource *cs)
416 {
417 unsigned long flags;
418 u8 overflow, tmp;
419 u32 ticks;
420
421 local_irq_save(flags);
422 tmp = in_8(PCCTOVR1) >> 4;
423 ticks = in_be32(PCCTCNT1);
424 overflow = in_8(PCCTOVR1) >> 4;
425 if (overflow != tmp)
426 ticks = in_be32(PCCTCNT1);
427 ticks += overflow * PCC_TIMER_CYCLES;
428 ticks += clk_total;
429 local_irq_restore(flags);
430
431 return ticks;
432 }
433
bcd2int(unsigned char b)434 int bcd2int (unsigned char b)
435 {
436 return ((b>>4)*10 + (b&15));
437 }
438
mvme16x_hwclk(int op,struct rtc_time * t)439 int mvme16x_hwclk(int op, struct rtc_time *t)
440 {
441 if (!op) {
442 rtc->ctrl = RTC_READ;
443 t->tm_year = bcd2int (rtc->bcd_year);
444 t->tm_mon = bcd2int(rtc->bcd_mth) - 1;
445 t->tm_mday = bcd2int (rtc->bcd_dom);
446 t->tm_hour = bcd2int (rtc->bcd_hr);
447 t->tm_min = bcd2int (rtc->bcd_min);
448 t->tm_sec = bcd2int (rtc->bcd_sec);
449 rtc->ctrl = 0;
450 if (t->tm_year < 70)
451 t->tm_year += 100;
452 } else {
453 /* FIXME Setting the time is not yet supported */
454 return -EOPNOTSUPP;
455 }
456 return 0;
457 }
458