Searched refs:Control_1 (Results 1 – 2 of 2) sorted by relevance
104 ret = ((!(rxdp->Control_1 & RXD_OWN_XENA)) && in RXD_IS_UP2DT()2500 if ((rxdp->Control_1 & RXD_OWN_XENA) && in fill_rx_buffers()2522 first_rxdp->Control_1 |= RXD_OWN_XENA; in fill_rx_buffers()2623 rxdp->Control_1 |= RXD_OWN_XENA; in fill_rx_buffers()2648 first_rxdp->Control_1 |= RXD_OWN_XENA; in fill_rx_buffers()3018 if (txdlp->Control_1 & TXD_T_CODE) { in tx_intr_handler()3020 err = txdlp->Control_1 & TXD_T_CODE; in tx_intr_handler()4109 txdp->Control_1 |= TXD_TCP_LSO_EN; in s2io_xmit()4118 txdp->Control_1 |= TXD_LIST_OWN_XENA; in s2io_xmit()4151 txdp->Control_1 |= TXD_GATHER_CODE_LAST; in s2io_xmit()[all …]
494 u64 Control_1; member535 u64 Control_1; member