1 /** @file 2 GUIDs and definitions used for Common Platform Error Record. 3 4 Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR> 5 (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR> 6 SPDX-License-Identifier: BSD-2-Clause-Patent 7 8 @par Revision Reference: 9 GUIDs defined in UEFI 2.7 Specification. 10 11 **/ 12 13 #ifndef CPER_GUID_H 14 #define CPER_GUID_H 15 16 #include <libcper/BaseTypes.h> 17 #include <libcper/common-utils.h> 18 19 #ifdef __cplusplus 20 extern "C" { 21 #endif 22 23 #pragma pack(push, 1) 24 25 #define EFI_ERROR_RECORD_SIGNATURE_START SIGNATURE_32('C', 'P', 'E', 'R') 26 #define EFI_ERROR_RECORD_SIGNATURE_END 0xFFFFFFFF 27 28 #define EFI_ERROR_RECORD_REVISION 0x0101 29 30 /// 31 /// Error Severity in Error Record Header and Error Section Descriptor 32 ///@{ 33 #define EFI_GENERIC_ERROR_RECOVERABLE 0x00000000 34 #define EFI_GENERIC_ERROR_FATAL 0x00000001 35 #define EFI_GENERIC_ERROR_CORRECTED 0x00000002 36 #define EFI_GENERIC_ERROR_INFO 0x00000003 37 ///@} 38 39 /// 40 /// The validation bit mask indicates the validity of the following fields 41 /// in Error Record Header. 42 ///@{ 43 #define EFI_ERROR_RECORD_HEADER_PLATFORM_ID_VALID BIT0 44 #define EFI_ERROR_RECORD_HEADER_TIME_STAMP_VALID BIT1 45 #define EFI_ERROR_RECORD_HEADER_PARTITION_ID_VALID BIT2 46 ///@} 47 48 /// 49 /// Timestamp is precise if this bit is set and correlates to the time of the 50 /// error event. 51 /// 52 #define EFI_ERROR_TIME_STAMP_PRECISE BIT0 53 54 /// 55 /// Hexadecimal string representation of a 64bit integer 56 /// 16 digits + 2 char + 1 null termination 57 /// 58 #define EFI_UINT64_HEX_STRING_LEN 19 59 60 /// 61 /// Length of a single line description for the entire section. 62 /// 63 #define SECTION_DESC_STRING_SIZE 512 64 65 /// 66 /// Length of the description of certain fields within the section. 67 /// 68 #define EFI_ERROR_DESCRIPTION_STRING_LEN 64 69 #define EFI_ERROR_INFORMATION_DESCRIPTION_STRING_LEN 128 70 71 /// 72 /// The timestamp correlates to the time when the error information was collected 73 /// by the system software and may not necessarily represent the time of the error 74 /// event. The timestamp contains the local time in BCD format. 75 /// 76 typedef struct { 77 UINT8 Seconds; 78 UINT8 Minutes; 79 UINT8 Hours; 80 UINT8 Flag; 81 UINT8 Day; 82 UINT8 Month; 83 UINT8 Year; 84 UINT8 Century; 85 } EFI_ERROR_TIME_STAMP; 86 87 /// 88 /// GUID value indicating the record association with an error event notification type. 89 ///@{ 90 #define EFI_EVENT_NOTIFICATION_TYEP_CMC_GUID \ 91 { 0x2DCE8BB1, \ 92 0xBDD7, \ 93 0x450e, \ 94 { 0xB9, 0xAD, 0x9C, 0xF4, 0xEB, 0xD4, 0xF8, 0x90 } } 95 #define EFI_EVENT_NOTIFICATION_TYEP_CPE_GUID \ 96 { 0x4E292F96, \ 97 0xD843, \ 98 0x4a55, \ 99 { 0xA8, 0xC2, 0xD4, 0x81, 0xF2, 0x7E, 0xBE, 0xEE } } 100 #define EFI_EVENT_NOTIFICATION_TYEP_MCE_GUID \ 101 { 0xE8F56FFE, \ 102 0x919C, \ 103 0x4cc5, \ 104 { 0xBA, 0x88, 0x65, 0xAB, 0xE1, 0x49, 0x13, 0xBB } } 105 #define EFI_EVENT_NOTIFICATION_TYEP_PCIE_GUID \ 106 { 0xCF93C01F, \ 107 0x1A16, \ 108 0x4dfc, \ 109 { 0xB8, 0xBC, 0x9C, 0x4D, 0xAF, 0x67, 0xC1, 0x04 } } 110 #define EFI_EVENT_NOTIFICATION_TYEP_INIT_GUID \ 111 { 0xCC5263E8, \ 112 0x9308, \ 113 0x454a, \ 114 { 0x89, 0xD0, 0x34, 0x0B, 0xD3, 0x9B, 0xC9, 0x8E } } 115 #define EFI_EVENT_NOTIFICATION_TYEP_NMI_GUID \ 116 { 0x5BAD89FF, \ 117 0xB7E6, \ 118 0x42c9, \ 119 { 0x81, 0x4A, 0xCF, 0x24, 0x85, 0xD6, 0xE9, 0x8A } } 120 #define EFI_EVENT_NOTIFICATION_TYEP_BOOT_GUID \ 121 { 0x3D61A466, \ 122 0xAB40, \ 123 0x409a, \ 124 { 0xA6, 0x98, 0xF3, 0x62, 0xD4, 0x64, 0xB3, 0x8F } } 125 #define EFI_EVENT_NOTIFICATION_TYEP_DMAR_GUID \ 126 { 0x667DD791, \ 127 0xC6B3, \ 128 0x4c27, \ 129 { 0x8A, 0x6B, 0x0F, 0x8E, 0x72, 0x2D, 0xEB, 0x41 } } 130 #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_SEA \ 131 { 0x9A78788A, \ 132 0xBBE8, \ 133 0x11E4, \ 134 { 0x80, 0x9E, 0x67, 0x61, 0x1E, 0x5D, 0x46, 0xB0 } } 135 #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_SEI \ 136 { 0x5C284C81, \ 137 0xB0AE, \ 138 0x4E87, \ 139 { 0xA3, 0x22, 0xB0, 0x4C, 0x85, 0x62, 0x43, 0x23 } } 140 #define EFI_EVENT_NOTIFICATION_TYPE_DMAR_PEI \ 141 { 0x09A9D5AC, \ 142 0x5204, \ 143 0x4214, \ 144 { 0x96, 0xE5, 0x94, 0x99, 0x2E, 0x75, 0x2B, 0xCD } } 145 ///@} 146 147 /// 148 /// Error Record Header Flags 149 ///@{ 150 #define EFI_HW_ERROR_FLAGS_RECOVERED 0x00000001 151 #define EFI_HW_ERROR_FLAGS_PREVERR 0x00000002 152 #define EFI_HW_ERROR_FLAGS_SIMULATED 0x00000004 153 ///@} 154 155 /// 156 /// Common error record header 157 /// 158 typedef struct { 159 UINT32 SignatureStart; 160 UINT16 Revision; 161 UINT32 SignatureEnd; 162 UINT16 SectionCount; 163 UINT32 ErrorSeverity; 164 UINT32 ValidationBits; 165 UINT32 RecordLength; 166 EFI_ERROR_TIME_STAMP TimeStamp; 167 EFI_GUID PlatformID; 168 EFI_GUID PartitionID; 169 EFI_GUID CreatorID; 170 EFI_GUID NotificationType; 171 UINT64 RecordID; 172 UINT32 Flags; 173 UINT64 PersistenceInfo; 174 UINT8 Resv1[12]; 175 /// 176 /// An array of SectionCount descriptors for the associated 177 /// sections. The number of valid sections is equivalent to the 178 /// SectionCount. The buffer size of the record may include 179 /// more space to dynamically add additional Section 180 /// Descriptors to the error record. 181 /// 182 } EFI_COMMON_ERROR_RECORD_HEADER; 183 184 #define EFI_ERROR_SECTION_REVISION 0x0100 185 186 /// 187 /// Validity Fields in Error Section Descriptor. 188 /// 189 #define EFI_ERROR_SECTION_FRU_ID_VALID BIT0 190 #define EFI_ERROR_SECTION_FRU_STRING_VALID BIT1 191 192 /// 193 /// Flag field contains information that describes the error section 194 /// in Error Section Descriptor. 195 /// 196 #define EFI_ERROR_SECTION_FLAGS_PRIMARY BIT0 197 #define EFI_ERROR_SECTION_FLAGS_CONTAINMENT_WARNING BIT1 198 #define EFI_ERROR_SECTION_FLAGS_RESET BIT2 199 #define EFI_ERROR_SECTION_FLAGS_ERROR_THRESHOLD_EXCEEDED BIT3 200 #define EFI_ERROR_SECTION_FLAGS_RESOURCE_NOT_ACCESSIBLE BIT4 201 #define EFI_ERROR_SECTION_FLAGS_LATENT_ERROR BIT5 202 203 /// 204 /// Error Sectition Type GUIDs in Error Section Descriptor 205 ///@{ 206 #define EFI_ERROR_SECTION_PROCESSOR_GENERIC_GUID \ 207 { 0x9876ccad, \ 208 0x47b4, \ 209 0x4bdb, \ 210 { 0xb6, 0x5e, 0x16, 0xf1, 0x93, 0xc4, 0xf3, 0xdb } } 211 #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_GUID \ 212 { 0xdc3ea0b0, \ 213 0xa144, \ 214 0x4797, \ 215 { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d } } 216 #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_IA32X64_GUID \ 217 { 0xdc3ea0b0, \ 218 0xa144, \ 219 0x4797, \ 220 { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d } } 221 #define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_ARM_GUID \ 222 { 0xe19e3d16, \ 223 0xbc11, \ 224 0x11e4, \ 225 { 0x9c, 0xaa, 0xc2, 0x05, 0x1d, 0x5d, 0x46, 0xb0 } } 226 #define EFI_ERROR_SECTION_ARM_RAS_GUID \ 227 { 0xBF32D4D5, \ 228 0xB427, \ 229 0x4025, \ 230 { 0x84, 0x95, 0x8A, 0x9E, 0x5D, 0x40, 0x30, 0xE4 } } 231 #define EFI_ERROR_SECTION_PLATFORM_MEMORY_GUID \ 232 { 0xa5bc1114, \ 233 0x6f64, \ 234 0x4ede, \ 235 { 0xb8, 0x63, 0x3e, 0x83, 0xed, 0x7c, 0x83, 0xb1 } } 236 #define EFI_ERROR_SECTION_PLATFORM_MEMORY2_GUID \ 237 { 0x61EC04FC, \ 238 0x48E6, \ 239 0xD813, \ 240 { 0x25, 0xC9, 0x8D, 0xAA, 0x44, 0x75, 0x0B, 0x12 } } 241 #define EFI_ERROR_SECTION_PCIE_GUID \ 242 { 0xd995e954, \ 243 0xbbc1, \ 244 0x430f, \ 245 { 0xad, 0x91, 0xb4, 0x4d, 0xcb, 0x3c, 0x6f, 0x35 } } 246 #define EFI_ERROR_SECTION_FW_ERROR_RECORD_GUID \ 247 { 0x81212a96, \ 248 0x09ed, \ 249 0x4996, \ 250 { 0x94, 0x71, 0x8d, 0x72, 0x9c, 0x8e, 0x69, 0xed } } 251 #define EFI_ERROR_SECTION_PCI_PCIX_BUS_GUID \ 252 { 0xc5753963, \ 253 0x3b84, \ 254 0x4095, \ 255 { 0xbf, 0x78, 0xed, 0xda, 0xd3, 0xf9, 0xc9, 0xdd } } 256 #define EFI_ERROR_SECTION_PCI_DEVICE_GUID \ 257 { 0xeb5e4685, \ 258 0xca66, \ 259 0x4769, \ 260 { 0xb6, 0xa2, 0x26, 0x06, 0x8b, 0x00, 0x13, 0x26 } } 261 #define EFI_ERROR_SECTION_DMAR_GENERIC_GUID \ 262 { 0x5b51fef7, \ 263 0xc79d, \ 264 0x4434, \ 265 { 0x8f, 0x1b, 0xaa, 0x62, 0xde, 0x3e, 0x2c, 0x64 } } 266 #define EFI_ERROR_SECTION_DIRECTED_IO_DMAR_GUID \ 267 { 0x71761d37, \ 268 0x32b2, \ 269 0x45cd, \ 270 { 0xa7, 0xd0, 0xb0, 0xfe, 0xdd, 0x93, 0xe8, 0xcf } } 271 #define EFI_ERROR_SECTION_IOMMU_DMAR_GUID \ 272 { 0x036f84e1, \ 273 0x7f37, \ 274 0x428c, \ 275 { 0xa7, 0x9e, 0x57, 0x5f, 0xdf, 0xaa, 0x84, 0xec } } 276 #define EFI_ERROR_SECTION_AMPERE_SPECIFIC_GUID \ 277 { 0x2826cc9f, \ 278 0x448c, \ 279 0x4c2b, \ 280 { 0x86, 0xb6, 0xa9, 0x53, 0x94, 0xb7, 0xef, 0x33 } } 281 ///@} 282 283 /// 284 /// Error Section Descriptor 285 /// 286 typedef struct { 287 UINT32 SectionOffset; 288 UINT32 SectionLength; 289 UINT16 Revision; 290 UINT8 SecValidMask; 291 UINT8 Resv1; 292 UINT32 SectionFlags; 293 EFI_GUID SectionType; 294 EFI_GUID FruId; 295 UINT32 Severity; 296 CHAR8 FruString[20]; 297 } EFI_ERROR_SECTION_DESCRIPTOR; 298 299 /// 300 /// The validation bit mask indicates whether or not each of the following fields are 301 /// valid in Proessor Generic Error section. 302 ///@{ 303 #define EFI_GENERIC_ERROR_PROC_TYPE_VALID BIT0 304 #define EFI_GENERIC_ERROR_PROC_ISA_VALID BIT1 305 #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_VALID BIT2 306 #define EFI_GENERIC_ERROR_PROC_OPERATION_VALID BIT3 307 #define EFI_GENERIC_ERROR_PROC_FLAGS_VALID BIT4 308 #define EFI_GENERIC_ERROR_PROC_LEVEL_VALID BIT5 309 #define EFI_GENERIC_ERROR_PROC_VERSION_VALID BIT6 310 #define EFI_GENERIC_ERROR_PROC_BRAND_VALID BIT7 311 #define EFI_GENERIC_ERROR_PROC_ID_VALID BIT8 312 #define EFI_GENERIC_ERROR_PROC_TARGET_ADDR_VALID BIT9 313 #define EFI_GENERIC_ERROR_PROC_REQUESTER_ID_VALID BIT10 314 #define EFI_GENERIC_ERROR_PROC_RESPONDER_ID_VALID BIT11 315 #define EFI_GENERIC_ERROR_PROC_INST_IP_VALID BIT12 316 ///@} 317 318 /// 319 /// The type of the processor architecture in Proessor Generic Error section. 320 ///@{ 321 #define EFI_GENERIC_ERROR_PROC_TYPE_IA32_X64 0x00 322 #define EFI_GENERIC_ERROR_PROC_TYPE_IA64 0x01 323 #define EFI_GENERIC_ERROR_PROC_TYPE_ARM 0x02 324 ///@} 325 326 /// 327 /// The type of the instruction set executing when the error occurred in Proessor 328 /// Generic Error section. 329 ///@{ 330 #define EFI_GENERIC_ERROR_PROC_ISA_IA32 0x00 331 #define EFI_GENERIC_ERROR_PROC_ISA_IA64 0x01 332 #define EFI_GENERIC_ERROR_PROC_ISA_X64 0x02 333 #define EFI_GENERIC_ERROR_PROC_ISA_ARM_A32_T32 0x03 334 #define EFI_GENERIC_ERROR_PROC_ISA_ARM_A64 0x04 335 ///@} 336 337 /// 338 /// The type of error that occurred in Proessor Generic Error section. 339 ///@{ 340 #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_UNKNOWN 0x00 341 #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_CACHE 0x01 342 #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_TLB 0x02 343 #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_BUS 0x04 344 #define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_MICRO_ARCH 0x08 345 ///@} 346 347 /// 348 /// The type of operation in Proessor Generic Error section. 349 ///@{ 350 #define EFI_GENERIC_ERROR_PROC_OPERATION_GENERIC 0x00 351 #define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_READ 0x01 352 #define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_WRITE 0x02 353 #define EFI_GENERIC_ERROR_PROC_OPERATION_INSTRUCTION_EXEC 0x03 354 ///@} 355 356 /// 357 /// Flags bit mask indicates additional information about the error in Proessor Generic 358 /// Error section 359 ///@{ 360 #define EFI_GENERIC_ERROR_PROC_FLAGS_RESTARTABLE BIT0 361 #define EFI_GENERIC_ERROR_PROC_FLAGS_PRECISE_IP BIT1 362 #define EFI_GENERIC_ERROR_PROC_FLAGS_OVERFLOW BIT2 363 #define EFI_GENERIC_ERROR_PROC_FLAGS_CORRECTED BIT3 364 ///@} 365 366 /// 367 /// Processor Generic Error Section 368 /// describes processor reported hardware errors for logical processors in the system. 369 /// 370 typedef struct { 371 UINT64 ValidFields; 372 UINT8 Type; 373 UINT8 Isa; 374 UINT8 ErrorType; 375 UINT8 Operation; 376 UINT8 Flags; 377 UINT8 Level; 378 UINT16 Resv1; 379 UINT64 VersionInfo; 380 CHAR8 BrandString[128]; 381 UINT64 ApicId; 382 UINT64 TargetAddr; 383 UINT64 RequestorId; 384 UINT64 ResponderId; 385 UINT64 InstructionIP; 386 } EFI_PROCESSOR_GENERIC_ERROR_DATA; 387 388 /// 389 /// IA32 and x64 Specific definitions. 390 /// 391 392 /// 393 /// GUID value indicating the type of Processor Error Information structure 394 /// in IA32/X64 Processor Error Information Structure. 395 ///@{ 396 #define EFI_IA32_X64_ERROR_TYPE_CACHE_CHECK_GUID \ 397 { 0xA55701F5, \ 398 0xE3EF, \ 399 0x43de, \ 400 { 0xAC, 0x72, 0x24, 0x9B, 0x57, 0x3F, 0xAD, 0x2C } } 401 #define EFI_IA32_X64_ERROR_TYPE_TLB_CHECK_GUID \ 402 { 0xFC06B535, \ 403 0x5E1F, \ 404 0x4562, \ 405 { 0x9F, 0x25, 0x0A, 0x3B, 0x9A, 0xDB, 0x63, 0xC3 } } 406 #define EFI_IA32_X64_ERROR_TYPE_BUS_CHECK_GUID \ 407 { 0x1CF3F8B3, \ 408 0xC5B1, \ 409 0x49a2, \ 410 { 0xAA, 0x59, 0x5E, 0xEF, 0x92, 0xFF, 0xA6, 0x3C } } 411 #define EFI_IA32_X64_ERROR_TYPE_MS_CHECK_GUID \ 412 { 0x48AB7F57, \ 413 0xDC34, \ 414 0x4f6c, \ 415 { 0xA7, 0xD3, 0xB0, 0xB5, 0xB0, 0xA7, 0x43, 0x14 } } 416 extern EFI_GUID gEfiIa32x64ErrorTypeCacheCheckGuid; 417 extern EFI_GUID gEfiIa32x64ErrorTypeTlbCheckGuid; 418 extern EFI_GUID gEfiIa32x64ErrorTypeBusCheckGuid; 419 extern EFI_GUID gEfiIa32x64ErrorTypeMsCheckGuid; 420 421 ///@} 422 423 /// 424 /// The validation bit mask indicates which fields in the IA32/X64 Processor 425 /// Error Record structure are valid. 426 ///@{ 427 #define EFI_IA32_X64_PROCESSOR_ERROR_APIC_ID_VALID BIT0 428 #define EFI_IA32_X64_PROCESSOR_ERROR_CPU_ID_INFO_VALID BIT1 429 ///@} 430 431 /// 432 /// IA32/X64 Processor Error Record 433 /// 434 typedef struct { 435 UINT64 ValidFields; 436 UINT64 ApicId; 437 UINT8 CpuIdInfo[48]; 438 } EFI_IA32_X64_PROCESSOR_ERROR_RECORD; 439 440 /// 441 /// The validation bit mask indicates which fields in the Cache Check structure 442 /// are valid. 443 ///@{ 444 #define EFI_CACHE_CHECK_TRANSACTION_TYPE_VALID BIT0 445 #define EFI_CACHE_CHECK_OPERATION_VALID BIT1 446 #define EFI_CACHE_CHECK_LEVEL_VALID BIT2 447 #define EFI_CACHE_CHECK_CONTEXT_CORRUPT_VALID BIT3 448 #define EFI_CACHE_CHECK_UNCORRECTED_VALID BIT4 449 #define EFI_CACHE_CHECK_PRECISE_IP_VALID BIT5 450 #define EFI_CACHE_CHECK_RESTARTABLE_VALID BIT6 451 #define EFI_CACHE_CHECK_OVERFLOW_VALID BIT7 452 ///@} 453 454 /// 455 /// Type of cache error in the Cache Check structure 456 ///@{ 457 #define EFI_CACHE_CHECK_ERROR_TYPE_INSTRUCTION 0 458 #define EFI_CACHE_CHECK_ERROR_TYPE_DATA_ACCESS 1 459 #define EFI_CACHE_CHECK_ERROR_TYPE_GENERIC 2 460 ///@} 461 462 /// 463 /// Type of cache operation that caused the error in the Cache 464 /// Check structure 465 ///@{ 466 #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC 0 467 #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_READ 1 468 #define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_WRITE 2 469 #define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_READ 3 470 #define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_WRITE 4 471 #define EFI_CACHE_CHECK_OPERATION_TYPE_INSTRUCTION_FETCH 5 472 #define EFI_CACHE_CHECK_OPERATION_TYPE_PREFETCH 6 473 #define EFI_CACHE_CHECK_OPERATION_TYPE_EVICTION 7 474 #define EFI_CACHE_CHECK_OPERATION_TYPE_SNOOP 8 475 ///@} 476 477 /// 478 /// IA32/X64 Cache Check Structure 479 /// 480 typedef struct { 481 UINT64 ValidFields : 16; 482 UINT64 TransactionType : 2; 483 UINT64 Operation : 4; 484 UINT64 Level : 3; 485 UINT64 ContextCorrupt : 1; 486 UINT64 ErrorUncorrected : 1; 487 UINT64 PreciseIp : 1; 488 UINT64 RestartableIp : 1; 489 UINT64 Overflow : 1; 490 UINT64 Resv1 : 34; 491 } EFI_IA32_X64_CACHE_CHECK_INFO; 492 493 /// 494 /// The validation bit mask indicates which fields in the TLB Check structure 495 /// are valid. 496 ///@{ 497 #define EFI_TLB_CHECK_TRANSACTION_TYPE_VALID BIT0 498 #define EFI_TLB_CHECK_OPERATION_VALID BIT1 499 #define EFI_TLB_CHECK_LEVEL_VALID BIT2 500 #define EFI_TLB_CHECK_CONTEXT_CORRUPT_VALID BIT3 501 #define EFI_TLB_CHECK_UNCORRECTED_VALID BIT4 502 #define EFI_TLB_CHECK_PRECISE_IP_VALID BIT5 503 #define EFI_TLB_CHECK_RESTARTABLE_VALID BIT6 504 #define EFI_TLB_CHECK_OVERFLOW_VALID BIT7 505 ///@} 506 507 /// 508 /// Type of cache error in the TLB Check structure 509 ///@{ 510 #define EFI_TLB_CHECK_ERROR_TYPE_INSTRUCTION 0 511 #define EFI_TLB_CHECK_ERROR_TYPE_DATA_ACCESS 1 512 #define EFI_TLB_CHECK_ERROR_TYPE_GENERIC 2 513 ///@} 514 515 /// 516 /// Type of cache operation that caused the error in the TLB 517 /// Check structure 518 ///@{ 519 #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC 0 520 #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_READ 1 521 #define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_WRITE 2 522 #define EFI_TLB_CHECK_OPERATION_TYPE_DATA_READ 3 523 #define EFI_TLB_CHECK_OPERATION_TYPE_DATA_WRITE 4 524 #define EFI_TLB_CHECK_OPERATION_TYPE_INST_FETCH 5 525 #define EFI_TLB_CHECK_OPERATION_TYPE_PREFETCH 6 526 ///@} 527 528 /// 529 /// IA32/X64 TLB Check Structure 530 /// 531 typedef struct { 532 UINT64 ValidFields : 16; 533 UINT64 TransactionType : 2; 534 UINT64 Operation : 4; 535 UINT64 Level : 3; 536 UINT64 ContextCorrupt : 1; 537 UINT64 ErrorUncorrected : 1; 538 UINT64 PreciseIp : 1; 539 UINT64 RestartableIp : 1; 540 UINT64 Overflow : 1; 541 UINT64 Resv1 : 34; 542 } EFI_IA32_X64_TLB_CHECK_INFO; 543 544 /// 545 /// The validation bit mask indicates which fields in the MS Check structure 546 /// are valid. 547 ///@{ 548 #define EFI_BUS_CHECK_TRANSACTION_TYPE_VALID BIT0 549 #define EFI_BUS_CHECK_OPERATION_VALID BIT1 550 #define EFI_BUS_CHECK_LEVEL_VALID BIT2 551 #define EFI_BUS_CHECK_CONTEXT_CORRUPT_VALID BIT3 552 #define EFI_BUS_CHECK_UNCORRECTED_VALID BIT4 553 #define EFI_BUS_CHECK_PRECISE_IP_VALID BIT5 554 #define EFI_BUS_CHECK_RESTARTABLE_VALID BIT6 555 #define EFI_BUS_CHECK_OVERFLOW_VALID BIT7 556 #define EFI_BUS_CHECK_PARTICIPATION_TYPE_VALID BIT8 557 #define EFI_BUS_CHECK_TIME_OUT_VALID BIT9 558 #define EFI_BUS_CHECK_ADDRESS_SPACE_VALID BIT10 559 ///@} 560 561 /// 562 /// Type of cache error in the Bus Check structure 563 ///@{ 564 #define EFI_BUS_CHECK_ERROR_TYPE_INSTRUCTION 0 565 #define EFI_BUS_CHECK_ERROR_TYPE_DATA_ACCESS 1 566 #define EFI_BUS_CHECK_ERROR_TYPE_GENERIC 2 567 ///@} 568 569 /// 570 /// Type of cache operation that caused the error in the Bus 571 /// Check structure 572 ///@{ 573 #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC 0 574 #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_READ 1 575 #define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_WRITE 2 576 #define EFI_BUS_CHECK_OPERATION_TYPE_DATA_READ 3 577 #define EFI_BUS_CHECK_OPERATION_TYPE_DATA_WRITE 4 578 #define EFI_BUS_CHECK_OPERATION_TYPE_INST_FETCH 5 579 #define EFI_BUS_CHECK_OPERATION_TYPE_PREFETCH 6 580 ///@} 581 582 /// 583 /// Type of Participation 584 ///@{ 585 #define EFI_BUS_CHECK_PARTICIPATION_TYPE_REQUEST 0 586 #define EFI_BUS_CHECK_PARTICIPATION_TYPE_RESPONDED 1 587 #define EFI_BUS_CHECK_PARTICIPATION_TYPE_OBSERVED 2 588 #define EFI_BUS_CHECK_PARTICIPATION_TYPE_GENERIC 3 589 ///@} 590 591 /// 592 /// Type of Address Space 593 ///@{ 594 #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_MEMORY 0 595 #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_RESERVED 1 596 #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_IO 2 597 #define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_OTHER 3 598 ///@} 599 600 /// 601 /// IA32/X64 Bus Check Structure 602 /// 603 typedef struct { 604 UINT64 ValidFields : 16; 605 UINT64 TransactionType : 2; 606 UINT64 Operation : 4; 607 UINT64 Level : 3; 608 UINT64 ContextCorrupt : 1; 609 UINT64 ErrorUncorrected : 1; 610 UINT64 PreciseIp : 1; 611 UINT64 RestartableIp : 1; 612 UINT64 Overflow : 1; 613 UINT64 ParticipationType : 2; 614 UINT64 TimeOut : 1; 615 UINT64 AddressSpace : 2; 616 UINT64 Resv1 : 29; 617 } EFI_IA32_X64_BUS_CHECK_INFO; 618 619 /// 620 /// The validation bit mask indicates which fields in the MS Check structure 621 /// are valid. 622 ///@{ 623 #define EFI_MS_CHECK_ERROR_TYPE_VALID BIT0 624 #define EFI_MS_CHECK_CONTEXT_CORRUPT_VALID BIT1 625 #define EFI_MS_CHECK_UNCORRECTED_VALID BIT2 626 #define EFI_MS_CHECK_PRECISE_IP_VALID BIT3 627 #define EFI_MS_CHECK_RESTARTABLE_VALID BIT4 628 #define EFI_MS_CHECK_OVERFLOW_VALID BIT5 629 ///@} 630 631 /// 632 /// Error type identifies the operation that caused the error. 633 ///@{ 634 #define EFI_MS_CHECK_ERROR_TYPE_NO 0 635 #define EFI_MS_CHECK_ERROR_TYPE_UNCLASSIFIED 1 636 #define EFI_MS_CHECK_ERROR_TYPE_MICROCODE_PARITY 2 637 #define EFI_MS_CHECK_ERROR_TYPE_EXTERNAL 3 638 #define EFI_MS_CHECK_ERROR_TYPE_FRC 4 639 #define EFI_MS_CHECK_ERROR_TYPE_INTERNAL_UNCLASSIFIED 5 640 ///@} 641 642 /// 643 /// IA32/X64 MS Check Field Description 644 /// 645 typedef struct { 646 UINT64 ValidFields : 16; 647 UINT64 ErrorType : 3; 648 UINT64 ContextCorrupt : 1; 649 UINT64 ErrorUncorrected : 1; 650 UINT64 PreciseIp : 1; 651 UINT64 RestartableIp : 1; 652 UINT64 Overflow : 1; 653 UINT64 Resv1 : 40; 654 } EFI_IA32_X64_MS_CHECK_INFO; 655 656 /// 657 /// IA32/X64 Check Information Item 658 /// 659 typedef union { 660 EFI_IA32_X64_CACHE_CHECK_INFO CacheCheck; 661 EFI_IA32_X64_TLB_CHECK_INFO TlbCheck; 662 EFI_IA32_X64_BUS_CHECK_INFO BusCheck; 663 EFI_IA32_X64_MS_CHECK_INFO MsCheck; 664 UINT64 Data64; 665 } EFI_IA32_X64_CHECK_INFO_ITEM; 666 667 /// 668 /// The validation bit mask indicates which fields in the IA32/X64 Processor Error 669 /// Information Structure are valid. 670 ///@{ 671 #define EFI_IA32_X64_ERROR_PROC_CHECK_INFO_VALID BIT0 672 #define EFI_IA32_X64_ERROR_PROC_TARGET_ADDR_VALID BIT1 673 #define EFI_IA32_X64_ERROR_PROC_REQUESTER_ID_VALID BIT2 674 #define EFI_IA32_X64_ERROR_PROC_RESPONDER_ID_VALID BIT3 675 #define EFI_IA32_X64_ERROR_PROC_INST_IP_VALID BIT4 676 ///@} 677 678 /// 679 /// IA32/X64 Processor Error Information Structure 680 /// 681 typedef struct { 682 EFI_GUID ErrorType; 683 UINT64 ValidFields; 684 EFI_IA32_X64_CHECK_INFO_ITEM CheckInfo; 685 UINT64 TargetId; 686 UINT64 RequestorId; 687 UINT64 ResponderId; 688 UINT64 InstructionIP; 689 } EFI_IA32_X64_PROCESS_ERROR_INFO; 690 691 /// 692 /// IA32/X64 Processor Context Information Structure 693 /// 694 typedef struct { 695 UINT16 RegisterType; 696 UINT16 ArraySize; 697 UINT32 MsrAddress; 698 UINT64 MmRegisterAddress; 699 // 700 // This field will provide the contents of the actual registers or raw data. 701 // The number of Registers or size of the raw data reported is determined 702 // by (Array Size / 8) or otherwise specified by the context structure type 703 // definition. 704 // 705 } EFI_IA32_X64_PROCESSOR_CONTEXT_INFO; 706 707 /// 708 /// Register Context Type 709 ///@{ 710 #define EFI_REG_CONTEXT_TYPE_UNCLASSIFIED 0x0000 711 #define EFI_REG_CONTEXT_TYPE_MSR 0x0001 712 #define EFI_REG_CONTEXT_TYPE_IA32 0x0002 713 #define EFI_REG_CONTEXT_TYPE_X64 0x0003 714 #define EFI_REG_CONTEXT_TYPE_FXSAVE 0x0004 715 #define EFI_REG_CONTEXT_TYPE_DR_IA32 0x0005 716 #define EFI_REG_CONTEXT_TYPE_DR_X64 0x0006 717 #define EFI_REG_CONTEXT_TYPE_MEM_MAP 0x0007 718 ///@} 719 720 /// 721 /// IA32 Register State 722 /// 723 typedef struct { 724 UINT32 Eax; 725 UINT32 Ebx; 726 UINT32 Ecx; 727 UINT32 Edx; 728 UINT32 Esi; 729 UINT32 Edi; 730 UINT32 Ebp; 731 UINT32 Esp; 732 UINT16 Cs; 733 UINT16 Ds; 734 UINT16 Ss; 735 UINT16 Es; 736 UINT16 Fs; 737 UINT16 Gs; 738 UINT32 Eflags; 739 UINT32 Eip; 740 UINT32 Cr0; 741 UINT32 Cr1; 742 UINT32 Cr2; 743 UINT32 Cr3; 744 UINT32 Cr4; 745 UINT32 Gdtr[2]; 746 UINT32 Idtr[2]; 747 UINT16 Ldtr; 748 UINT16 Tr; 749 } EFI_CONTEXT_IA32_REGISTER_STATE; 750 751 /// 752 /// X64 Register State 753 /// 754 typedef struct { 755 UINT64 Rax; 756 UINT64 Rbx; 757 UINT64 Rcx; 758 UINT64 Rdx; 759 UINT64 Rsi; 760 UINT64 Rdi; 761 UINT64 Rbp; 762 UINT64 Rsp; 763 UINT64 R8; 764 UINT64 R9; 765 UINT64 R10; 766 UINT64 R11; 767 UINT64 R12; 768 UINT64 R13; 769 UINT64 R14; 770 UINT64 R15; 771 UINT16 Cs; 772 UINT16 Ds; 773 UINT16 Ss; 774 UINT16 Es; 775 UINT16 Fs; 776 UINT16 Gs; 777 UINT32 Resv1; 778 UINT64 Rflags; 779 UINT64 Rip; 780 UINT64 Cr0; 781 UINT64 Cr1; 782 UINT64 Cr2; 783 UINT64 Cr3; 784 UINT64 Cr4; 785 UINT64 Cr8; 786 UINT64 Gdtr[2]; 787 UINT64 Idtr[2]; 788 UINT16 Ldtr; 789 UINT16 Tr; 790 } EFI_CONTEXT_X64_REGISTER_STATE; 791 792 /// 793 /// The validation bit mask indicates each of the following field is in IA32/X64 794 /// Processor Error Section. 795 /// 796 typedef struct { 797 UINT64 ApicIdValid : 1; 798 UINT64 CpuIdInforValid : 1; 799 UINT64 ErrorInfoNum : 6; 800 UINT64 ContextNum : 6; 801 UINT64 Resv1 : 50; 802 } EFI_IA32_X64_VALID_BITS; 803 804 /// 805 /// Error Status Fields 806 /// 807 typedef struct { 808 UINT64 Resv1 : 8; 809 UINT64 Type : 8; 810 // Error in Address signals or in Address portion of transaction 811 UINT64 AddressSignal : 1; 812 // Error in Control signals or in Control portion of transaction 813 UINT64 ControlSignal : 1; 814 // Error in Data signals or in Data portion of transaction 815 UINT64 DataSignal : 1; 816 // Error detected by responder 817 UINT64 DetectedByResponder : 1; 818 // Error detected by requestor 819 UINT64 DetectedByRequester : 1; 820 // First Error in the sequence - option field 821 UINT64 FirstError : 1; 822 // Additional errors were not logged due to lack of resources 823 UINT64 OverflowNotLogged : 1; 824 UINT64 Resv2 : 41; 825 } EFI_GENERIC_ERROR_STATUS; 826 827 /// 828 /// CPER Generic Error Codes 829 /// 830 #define CPER_GENERIC_ERROR_TYPES_KEYS \ 831 ( \ 832 int[]){ 1, 16, 4, 5, 6, 7, 8, 9, 17, \ 833 18, 19, 20, 21, 22, 23, 24, 25, 26 } 834 #define CPER_GENERIC_ERROR_TYPES_VALUES \ 835 (const char *[]){ "ERR_INTERNAL", "ERR_BUS", "ERR_MEM", \ 836 "ERR_TLB", "ERR_CACHE", "ERR_FUNCTION", \ 837 "ERR_SELFTEST", "ERR_FLOW", "ERR_MAP", \ 838 "ERR_IMPROPER", "ERR_UNIMPL", "ERR_LOL", \ 839 "ERR_RESPONSE", "ERR_PARITY", "ERR_PROTOCOL", \ 840 "ERR_ERROR", "ERR_TIMEOUT", "ERR_POISONED" } 841 #define CPER_GENERIC_ERROR_TYPES_DESCRIPTIONS \ 842 (const char *[]){ \ 843 "Error detected internal to the component.", \ 844 "Error detected in the bus.", \ 845 "Storage error in memory (DRAM).", \ 846 "Storage error in TLB.", \ 847 "Storage error in cache.", \ 848 "Error in one or more functional units.", \ 849 "Component failed self test.", \ 850 "Overflow or underflow of internal queue.", \ 851 "Virtual address not found on IO-TLB or IO-PDIR.", \ 852 "Improper access error.", \ 853 "Access to a memory address which is not mapped to any component.", \ 854 "Loss of Lockstep error.", \ 855 "Response not associated with a request.", \ 856 "Bus parity error (must also set the A, C, or D bits).", \ 857 "Detection of a protocol error.", \ 858 "Detection of a PATH_ERROR.", \ 859 "Bus operation timeout.", \ 860 "A read was issued to data that has been poisoned." \ 861 } 862 863 /// 864 /// Error Type 865 /// 866 typedef enum { 867 /// 868 /// General Internal errors 869 /// 870 ErrorInternal = 1, 871 ErrorBus = 16, 872 /// 873 /// Component Internal errors 874 /// 875 ErrorMemStorage = 4, // Error in memory device 876 ErrorTlbStorage = 5, // TLB error in cache 877 ErrorCacheStorage = 6, 878 ErrorFunctionalUnit = 7, 879 ErrorSelftest = 8, 880 ErrorOverflow = 9, 881 /// 882 /// Bus internal errors 883 /// 884 ErrorVirtualMap = 17, 885 ErrorAccessInvalid = 18, // Improper access 886 ErrorUnimplAccess = 19, // Unimplemented memory access 887 ErrorLossOfLockstep = 20, 888 ErrorResponseInvalid = 21, // Response not associated with request 889 ErrorParity = 22, 890 ErrorProtocol = 23, 891 ErrorPath = 24, // Detected path error 892 ErrorTimeout = 25, // Bus timeout 893 ErrorPoisoned = 26 // Read data poisoned 894 } EFI_GENERIC_ERROR_STATUS_ERROR_TYPE; 895 896 /// 897 /// Validation bit mask indicates which fields in the memory error record are valid 898 /// in Memory Error section 899 ///@{ 900 #define EFI_PLATFORM_MEMORY_ERROR_STATUS_VALID BIT0 901 #define EFI_PLATFORM_MEMORY_PHY_ADDRESS_VALID BIT1 902 #define EFI_PLATFORM_MEMORY_PHY_ADDRESS_MASK_VALID BIT2 903 #define EFI_PLATFORM_MEMORY_NODE_VALID BIT3 904 #define EFI_PLATFORM_MEMORY_CARD_VALID BIT4 905 #define EFI_PLATFORM_MEMORY_MODULE_VALID BIT5 906 #define EFI_PLATFORM_MEMORY_BANK_VALID BIT6 907 #define EFI_PLATFORM_MEMORY_DEVICE_VALID BIT7 908 #define EFI_PLATFORM_MEMORY_ROW_VALID BIT8 909 #define EFI_PLATFORM_MEMORY_COLUMN_VALID BIT9 910 #define EFI_PLATFORM_MEMORY_BIT_POS_VALID BIT10 911 #define EFI_PLATFORM_MEMORY_REQUESTOR_ID_VALID BIT11 912 #define EFI_PLATFORM_MEMORY_RESPONDER_ID_VALID BIT12 913 #define EFI_PLATFORM_MEMORY_TARGET_ID_VALID BIT13 914 #define EFI_PLATFORM_MEMORY_ERROR_TYPE_VALID BIT14 915 #define EFI_PLATFORM_MEMORY_ERROR_RANK_NUM_VALID BIT15 916 #define EFI_PLATFORM_MEMORY_ERROR_CARD_HANDLE_VALID BIT16 917 #define EFI_PLATFORM_MEMORY_ERROR_MODULE_HANDLE_VALID BIT17 918 #define EFI_PLATFORM_MEMORY_ERROR_EXTENDED_ROW_BIT_16_17_VALID BIT18 919 #define EFI_PLATFORM_MEMORY_ERROR_BANK_GROUP_VALID BIT19 920 #define EFI_PLATFORM_MEMORY_ERROR_BANK_ADDRESS_VALID BIT20 921 #define EFI_PLATFORM_MEMORY_ERROR_CHIP_IDENTIFICATION_VALID BIT21 922 ///@} 923 924 /// 925 /// Memory Error Type identifies the type of error that occurred in Memory 926 /// Error section 927 ///@{ 928 #define EFI_PLATFORM_MEMORY_ERROR_UNKNOWN 0x00 929 #define EFI_PLATFORM_MEMORY_ERROR_NONE 0x01 930 #define EFI_PLATFORM_MEMORY_ERROR_SINGLEBIT_ECC 0x02 931 #define EFI_PLATFORM_MEMORY_ERROR_MLTIBIT_ECC 0x03 932 #define EFI_PLATFORM_MEMORY_ERROR_SINGLESYMBOLS_CHIPKILL 0x04 933 #define EFI_PLATFORM_MEMORY_ERROR_MULTISYMBOL_CHIPKILL 0x05 934 #define EFI_PLATFORM_MEMORY_ERROR_MATER_ABORT 0x06 935 #define EFI_PLATFORM_MEMORY_ERROR_TARGET_ABORT 0x07 936 #define EFI_PLATFORM_MEMORY_ERROR_PARITY 0x08 937 #define EFI_PLATFORM_MEMORY_ERROR_WDT 0x09 938 #define EFI_PLATFORM_MEMORY_ERROR_INVALID_ADDRESS 0x0A 939 #define EFI_PLATFORM_MEMORY_ERROR_MIRROR_FAILED 0x0B 940 #define EFI_PLATFORM_MEMORY_ERROR_SPARING 0x0C 941 #define EFI_PLATFORM_MEMORY_ERROR_SCRUB_CORRECTED 0x0D 942 #define EFI_PLATFORM_MEMORY_ERROR_SCRUB_UNCORRECTED 0x0E 943 #define EFI_PLATFORM_MEMORY_ERROR_MEMORY_MAP_EVENT 0x0F 944 ///@} 945 946 /// 947 /// Memory Error Section 948 /// 949 typedef struct { 950 UINT64 ValidFields; 951 EFI_GENERIC_ERROR_STATUS ErrorStatus; 952 UINT64 PhysicalAddress; // Error physical address 953 UINT64 PhysicalAddressMask; // Grnaularity 954 UINT16 Node; // Node # 955 UINT16 Card; 956 UINT16 ModuleRank; // Module or Rank# 957 UINT16 Bank; 958 UINT16 Device; 959 UINT16 Row; 960 UINT16 Column; 961 UINT16 BitPosition; 962 UINT64 RequestorId; 963 UINT64 ResponderId; 964 UINT64 TargetId; 965 UINT8 ErrorType; 966 UINT8 Extended; 967 UINT16 RankNum; 968 UINT16 CardHandle; 969 UINT16 ModuleHandle; 970 } EFI_PLATFORM_MEMORY_ERROR_DATA; 971 972 /// 973 /// Validation bit mask indicates which fields in the memory error record 2 are valid 974 /// in Memory Error section 2 975 ///@{ 976 #define EFI_PLATFORM_MEMORY2_ERROR_STATUS_VALID BIT0 977 #define EFI_PLATFORM_MEMORY2_PHY_ADDRESS_VALID BIT1 978 #define EFI_PLATFORM_MEMORY2_PHY_ADDRESS_MASK_VALID BIT2 979 #define EFI_PLATFORM_MEMORY2_NODE_VALID BIT3 980 #define EFI_PLATFORM_MEMORY2_CARD_VALID BIT4 981 #define EFI_PLATFORM_MEMORY2_MODULE_VALID BIT5 982 #define EFI_PLATFORM_MEMORY2_BANK_VALID BIT6 983 #define EFI_PLATFORM_MEMORY2_DEVICE_VALID BIT7 984 #define EFI_PLATFORM_MEMORY2_ROW_VALID BIT8 985 #define EFI_PLATFORM_MEMORY2_COLUMN_VALID BIT9 986 #define EFI_PLATFORM_MEMORY2_RANK_VALID BIT10 987 #define EFI_PLATFORM_MEMORY2_BIT_POS_VALID BIT11 988 #define EFI_PLATFORM_MEMORY2_CHIP_ID_VALID BIT12 989 #define EFI_PLATFORM_MEMORY2_MEMORY_ERROR_TYPE_VALID BIT13 990 #define EFI_PLATFORM_MEMORY2_STATUS_VALID BIT14 991 #define EFI_PLATFORM_MEMORY2_REQUESTOR_ID_VALID BIT15 992 #define EFI_PLATFORM_MEMORY2_RESPONDER_ID_VALID BIT16 993 #define EFI_PLATFORM_MEMORY2_TARGET_ID_VALID BIT17 994 #define EFI_PLATFORM_MEMORY2_CARD_HANDLE_VALID BIT18 995 #define EFI_PLATFORM_MEMORY2_MODULE_HANDLE_VALID BIT19 996 #define EFI_PLATFORM_MEMORY2_BANK_GROUP_VALID BIT20 997 #define EFI_PLATFORM_MEMORY2_BANK_ADDRESS_VALID BIT21 998 ///@} 999 1000 /// 1001 /// Memory Error Type identifies the type of error that occurred in Memory 1002 /// Error section 2 1003 ///@{ 1004 #define EFI_PLATFORM_MEMORY2_ERROR_UNKNOWN 0x00 1005 #define EFI_PLATFORM_MEMORY2_ERROR_NONE 0x01 1006 #define EFI_PLATFORM_MEMORY2_ERROR_SINGLEBIT_ECC 0x02 1007 #define EFI_PLATFORM_MEMORY2_ERROR_MLTIBIT_ECC 0x03 1008 #define EFI_PLATFORM_MEMORY2_ERROR_SINGLESYMBOL_CHIPKILL 0x04 1009 #define EFI_PLATFORM_MEMORY2_ERROR_MULTISYMBOL_CHIPKILL 0x05 1010 #define EFI_PLATFORM_MEMORY2_ERROR_MASTER_ABORT 0x06 1011 #define EFI_PLATFORM_MEMORY2_ERROR_TARGET_ABORT 0x07 1012 #define EFI_PLATFORM_MEMORY2_ERROR_PARITY 0x08 1013 #define EFI_PLATFORM_MEMORY2_ERROR_WDT 0x09 1014 #define EFI_PLATFORM_MEMORY2_ERROR_INVALID_ADDRESS 0x0A 1015 #define EFI_PLATFORM_MEMORY2_ERROR_MIRROR_BROKEN 0x0B 1016 #define EFI_PLATFORM_MEMORY2_ERROR_MEMORY_SPARING 0x0C 1017 #define EFI_PLATFORM_MEMORY2_ERROR_SCRUB_CORRECTED 0x0D 1018 #define EFI_PLATFORM_MEMORY2_ERROR_SCRUB_UNCORRECTED 0x0E 1019 #define EFI_PLATFORM_MEMORY2_ERROR_MEMORY_MAP_EVENT 0x0F 1020 ///@} 1021 1022 /// 1023 /// Memory Error Section 2 1024 /// 1025 typedef struct { 1026 UINT64 ValidFields; 1027 EFI_GENERIC_ERROR_STATUS ErrorStatus; 1028 UINT64 PhysicalAddress; // Error physical address 1029 UINT64 PhysicalAddressMask; // Grnaularity 1030 UINT16 Node; // Node # 1031 UINT16 Card; 1032 UINT16 Module; // Module or Rank# 1033 UINT16 Bank; 1034 UINT32 Device; 1035 UINT32 Row; 1036 UINT32 Column; 1037 UINT32 Rank; 1038 UINT32 BitPosition; 1039 UINT8 ChipId; 1040 UINT8 MemErrorType; 1041 UINT8 Status; 1042 UINT8 Reserved; 1043 UINT64 RequestorId; 1044 UINT64 ResponderId; 1045 UINT64 TargetId; 1046 UINT32 CardHandle; 1047 UINT32 ModuleHandle; 1048 } EFI_PLATFORM_MEMORY2_ERROR_DATA; 1049 1050 /// 1051 /// Validation bits mask indicates which of the following fields is valid 1052 /// in PCI Express Error Record. 1053 ///@{ 1054 #define EFI_PCIE_ERROR_PORT_TYPE_VALID BIT0 1055 #define EFI_PCIE_ERROR_VERSION_VALID BIT1 1056 #define EFI_PCIE_ERROR_COMMAND_STATUS_VALID BIT2 1057 #define EFI_PCIE_ERROR_DEVICE_ID_VALID BIT3 1058 #define EFI_PCIE_ERROR_SERIAL_NO_VALID BIT4 1059 #define EFI_PCIE_ERROR_BRIDGE_CRL_STS_VALID BIT5 1060 #define EFI_PCIE_ERROR_CAPABILITY_INFO_VALID BIT6 1061 #define EFI_PCIE_ERROR_AER_INFO_VALID BIT7 1062 ///@} 1063 1064 /// 1065 /// PCIe Device/Port Type as defined in the PCI Express capabilities register 1066 ///@{ 1067 #define EFI_PCIE_ERROR_PORT_PCIE_ENDPOINT 0x00000000 1068 #define EFI_PCIE_ERROR_PORT_PCI_ENDPOINT 0x00000001 1069 #define EFI_PCIE_ERROR_PORT_ROOT_PORT 0x00000004 1070 #define EFI_PCIE_ERROR_PORT_UPSWITCH_PORT 0x00000005 1071 #define EFI_PCIE_ERROR_PORT_DOWNSWITCH_PORT 0x00000006 1072 #define EFI_PCIE_ERROR_PORT_PCIE_TO_PCI_BRIDGE 0x00000007 1073 #define EFI_PCIE_ERROR_PORT_PCI_TO_PCIE_BRIDGE 0x00000008 1074 #define EFI_PCIE_ERROR_PORT_ROOT_INT_ENDPOINT 0x00000009 1075 #define EFI_PCIE_ERROR_PORT_ROOT_EVENT_COLLECTOR 0x0000000A 1076 ///@} 1077 1078 /// 1079 /// PCI Slot number 1080 /// 1081 typedef struct { 1082 UINT16 Resv1 : 3; 1083 UINT16 Number : 13; 1084 } EFI_GENERIC_ERROR_PCI_SLOT; 1085 1086 /// 1087 /// PCIe Root Port PCI/bridge PCI compatible device number and 1088 /// bus number information to uniquely identify the root port or 1089 /// bridge. Default values for both the bus numbers is zero. 1090 /// 1091 typedef struct { 1092 UINT16 VendorId; 1093 UINT16 DeviceId; 1094 UINT8 ClassCode[3]; 1095 UINT8 Function; 1096 UINT8 Device; 1097 UINT16 Segment; 1098 UINT8 PrimaryOrDeviceBus; 1099 UINT8 SecondaryBus; 1100 EFI_GENERIC_ERROR_PCI_SLOT Slot; 1101 UINT8 Resv1; 1102 } EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID; 1103 1104 /// 1105 /// PCIe Capability Structure 1106 /// 1107 typedef struct { 1108 UINT8 PcieCap[60]; 1109 } EFI_PCIE_ERROR_DATA_CAPABILITY; 1110 1111 /// 1112 /// PCIe Advanced Error Reporting Extended Capability Structure. 1113 /// 1114 typedef struct { 1115 UINT8 PcieAer[96]; 1116 } EFI_PCIE_ERROR_DATA_AER; 1117 1118 /// 1119 /// PCI Express Error Record 1120 /// 1121 typedef struct { 1122 UINT64 ValidFields; 1123 UINT32 PortType; 1124 UINT32 Version; 1125 UINT32 CommandStatus; 1126 UINT32 Resv2; 1127 EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID DevBridge; 1128 UINT64 SerialNo; 1129 UINT32 BridgeControlStatus; 1130 EFI_PCIE_ERROR_DATA_CAPABILITY Capability; 1131 EFI_PCIE_ERROR_DATA_AER AerInfo; 1132 } EFI_PCIE_ERROR_DATA; 1133 1134 /// 1135 /// Validation bits Indicates which of the following fields is valid 1136 /// in PCI/PCI-X Bus Error Section. 1137 ///@{ 1138 #define EFI_PCI_PCIX_BUS_ERROR_STATUS_VALID BIT0 1139 #define EFI_PCI_PCIX_BUS_ERROR_TYPE_VALID BIT1 1140 #define EFI_PCI_PCIX_BUS_ERROR_BUS_ID_VALID BIT2 1141 #define EFI_PCI_PCIX_BUS_ERROR_BUS_ADDRESS_VALID BIT3 1142 #define EFI_PCI_PCIX_BUS_ERROR_BUS_DATA_VALID BIT4 1143 #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_VALID BIT5 1144 #define EFI_PCI_PCIX_BUS_ERROR_REQUESTOR_ID_VALID BIT6 1145 #define EFI_PCI_PCIX_BUS_ERROR_COMPLETER_ID_VALID BIT7 1146 #define EFI_PCI_PCIX_BUS_ERROR_TARGET_ID_VALID BIT8 1147 ///@} 1148 1149 /// 1150 /// PCI Bus Error Type in PCI/PCI-X Bus Error Section 1151 ///@{ 1152 #define EFI_PCI_PCIX_BUS_ERROR_UNKNOWN 0x0000 1153 #define EFI_PCI_PCIX_BUS_ERROR_DATA_PARITY 0x0001 1154 #define EFI_PCI_PCIX_BUS_ERROR_SYSTEM 0x0002 1155 #define EFI_PCI_PCIX_BUS_ERROR_MASTER_ABORT 0x0003 1156 #define EFI_PCI_PCIX_BUS_ERROR_BUS_TIMEOUT 0x0004 1157 #define EFI_PCI_PCIX_BUS_ERROR_MASTER_DATA_PARITY 0x0005 1158 #define EFI_PCI_PCIX_BUS_ERROR_ADDRESS_PARITY 0x0006 1159 #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_PARITY 0x0007 1160 ///@} 1161 1162 /// 1163 /// PCI/PCI-X Bus Error Section 1164 /// 1165 typedef struct { 1166 UINT64 ValidFields; 1167 EFI_GENERIC_ERROR_STATUS ErrorStatus; 1168 UINT16 Type; 1169 UINT16 BusId; 1170 UINT32 Resv2; 1171 UINT64 BusAddress; 1172 UINT64 BusData; 1173 UINT64 BusCommand; 1174 UINT64 RequestorId; 1175 UINT64 ResponderId; 1176 UINT64 TargetId; 1177 } EFI_PCI_PCIX_BUS_ERROR_DATA; 1178 1179 /// 1180 /// Validation bits Indicates which of the following fields is valid 1181 /// in PCI/PCI-X Component Error Section. 1182 ///@{ 1183 #define EFI_PCI_PCIX_DEVICE_ERROR_STATUS_VALID BIT0 1184 #define EFI_PCI_PCIX_DEVICE_ERROR_ID_INFO_VALID BIT1 1185 #define EFI_PCI_PCIX_DEVICE_ERROR_MEM_NUM_VALID BIT2 1186 #define EFI_PCI_PCIX_DEVICE_ERROR_IO_NUM_VALID BIT3 1187 #define EFI_PCI_PCIX_DEVICE_ERROR_REG_DATA_PAIR_VALID BIT4 1188 ///@} 1189 1190 /// 1191 /// PCI/PCI-X Device Identification Information 1192 /// 1193 typedef struct { 1194 UINT16 VendorId; 1195 UINT16 DeviceId; 1196 UINT8 ClassCode[3]; 1197 UINT8 Function; 1198 UINT8 Device; 1199 UINT8 Bus; 1200 UINT8 Segment; 1201 UINT8 Resv1; 1202 UINT32 Resv2; 1203 } EFI_GENERIC_ERROR_PCI_DEVICE_ID; 1204 1205 /// 1206 /// Identifies the type of firmware error record 1207 ///@{ 1208 #define EFI_FIRMWARE_ERROR_TYPE_IPF_SAL 0x00 1209 #define EFI_FIRMWARE_ERROR_TYPE_SOC_TYPE1 0x01 1210 #define EFI_FIRMWARE_ERROR_TYPE_SOC_TYPE2 0x02 1211 ///@} 1212 1213 /// 1214 /// Firmware Error Record Section 1215 /// 1216 typedef struct { 1217 UINT8 ErrorType; 1218 UINT8 Revision; 1219 UINT8 Resv1[6]; 1220 UINT64 RecordId; 1221 EFI_GUID RecordIdGuid; 1222 } EFI_FIRMWARE_ERROR_DATA; 1223 1224 /// 1225 /// Fault Reason in DMAr Generic Error Section 1226 ///@{ 1227 #define EFI_DMA_FAULT_REASON_TABLE_ENTRY_NOT_PRESENT 0x01 1228 #define EFI_DMA_FAULT_REASON_TABLE_ENTRY_INVALID 0x02 1229 #define EFI_DMA_FAULT_REASON_ACCESS_MAPPING_TABLE_ERROR 0x03 1230 #define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_MAPPING_TABLE 0x04 1231 #define EFI_DMA_FAULT_REASON_ACCESS_ADDR_OUT_OF_SPACE 0x05 1232 #define EFI_DMA_FAULT_REASON_INVALID_ACCESS 0x06 1233 #define EFI_DMA_FAULT_REASON_INVALID_REQUEST 0x07 1234 #define EFI_DMA_FAULT_REASON_ACCESS_TRANSLATE_TABLE_ERROR 0x08 1235 #define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_TRANSLATE_TABLE 0x09 1236 #define EFI_DMA_FAULT_REASON_INVALID_COMMAOND 0x0A 1237 #define EFI_DMA_FAULT_REASON_ACCESS_COMMAND_BUFFER_ERROR 0x0B 1238 ///@} 1239 1240 /// 1241 /// DMA access type in DMAr Generic Error Section 1242 ///@{ 1243 #define EFI_DMA_ACCESS_TYPE_READ 0x00 1244 #define EFI_DMA_ACCESS_TYPE_WRITE 0x01 1245 ///@} 1246 1247 /// 1248 /// DMA address type in DMAr Generic Error Section 1249 ///@{ 1250 #define EFI_DMA_ADDRESS_UNTRANSLATED 0x00 1251 #define EFI_DMA_ADDRESS_TRANSLATION 0x01 1252 ///@} 1253 1254 /// 1255 /// Architecture type in DMAr Generic Error Section 1256 ///@{ 1257 #define EFI_DMA_ARCH_TYPE_VT 0x01 1258 #define EFI_DMA_ARCH_TYPE_IOMMU 0x02 1259 ///@} 1260 1261 /// 1262 /// DMAr Generic Error Section 1263 /// 1264 typedef struct { 1265 UINT16 RequesterId; 1266 UINT16 SegmentNumber; 1267 UINT8 FaultReason; 1268 UINT8 AccessType; 1269 UINT8 AddressType; 1270 UINT8 ArchType; 1271 UINT64 DeviceAddr; 1272 UINT8 Resv1[16]; 1273 } EFI_DMAR_GENERIC_ERROR_DATA; 1274 1275 /// 1276 /// Intel VT for Directed I/O specific DMAr Errors 1277 /// 1278 typedef struct { 1279 UINT8 Version; 1280 UINT8 Revision; 1281 UINT8 OemId[6]; 1282 UINT64 Capability; 1283 UINT64 CapabilityEx; 1284 UINT32 GlobalCommand; 1285 UINT32 GlobalStatus; 1286 UINT32 FaultStatus; 1287 UINT8 Resv1[12]; 1288 UINT64 FaultRecord[2]; 1289 UINT64 RootEntry[2]; 1290 UINT64 ContextEntry[2]; 1291 UINT64 PteL6; 1292 UINT64 PteL5; 1293 UINT64 PteL4; 1294 UINT64 PteL3; 1295 UINT64 PteL2; 1296 UINT64 PteL1; 1297 } EFI_DIRECTED_IO_DMAR_ERROR_DATA; 1298 1299 /// 1300 /// IOMMU specific DMAr Errors 1301 /// 1302 typedef struct { 1303 UINT8 Revision; 1304 UINT8 Resv1[7]; 1305 UINT64 Control; 1306 UINT64 Status; 1307 UINT8 Resv2[8]; 1308 UINT64 EventLogEntry[2]; 1309 UINT8 Resv3[16]; 1310 UINT64 DeviceTableEntry[4]; 1311 UINT64 PteL6; 1312 UINT64 PteL5; 1313 UINT64 PteL4; 1314 UINT64 PteL3; 1315 UINT64 PteL2; 1316 UINT64 PteL1; 1317 } EFI_IOMMU_DMAR_ERROR_DATA; 1318 1319 extern EFI_GUID gEfiEventNotificationTypeCmcGuid; 1320 extern EFI_GUID gEfiEventNotificationTypeCpeGuid; 1321 extern EFI_GUID gEfiEventNotificationTypeMceGuid; 1322 extern EFI_GUID gEfiEventNotificationTypePcieGuid; 1323 extern EFI_GUID gEfiEventNotificationTypeInitGuid; 1324 extern EFI_GUID gEfiEventNotificationTypeNmiGuid; 1325 extern EFI_GUID gEfiEventNotificationTypeBootGuid; 1326 extern EFI_GUID gEfiEventNotificationTypeDmarGuid; 1327 extern EFI_GUID gEfiEventNotificationTypeSeaGuid; 1328 extern EFI_GUID gEfiEventNotificationTypeSeiGuid; 1329 extern EFI_GUID gEfiEventNotificationTypePeiGuid; 1330 extern EFI_GUID gEfiEventNotificationTypeCxlGuid; 1331 extern EFI_GUID gEfiProcessorGenericErrorSectionGuid; 1332 extern EFI_GUID gEfiProcessorSpecificErrorSectionGuid; 1333 extern EFI_GUID gEfiIa32X64ProcessorErrorSectionGuid; 1334 extern EFI_GUID gEfiIpfProcessorErrorSectionGuid; 1335 extern EFI_GUID gEfiArmProcessorErrorSectionGuid; 1336 extern EFI_GUID gEfiArmRasNodeSectionGuid; 1337 extern EFI_GUID gEfiPlatformMemoryErrorSectionGuid; 1338 extern EFI_GUID gEfiPlatformMemoryError2SectionGuid; 1339 extern EFI_GUID gEfiPcieErrorSectionGuid; 1340 extern EFI_GUID gEfiFirmwareErrorSectionGuid; 1341 extern EFI_GUID gEfiPciBusErrorSectionGuid; 1342 extern EFI_GUID gEfiPciDevErrorSectionGuid; 1343 extern EFI_GUID gEfiDMArGenericErrorSectionGuid; 1344 extern EFI_GUID gEfiDirectedIoDMArErrorSectionGuid; 1345 extern EFI_GUID gEfiIommuDMArErrorSectionGuid; 1346 extern EFI_GUID gEfiCcixPerLogErrorSectionGuid; 1347 extern EFI_GUID gEfiCxlProtocolErrorSectionGuid; 1348 extern EFI_GUID gEfiCxlGeneralMediaErrorSectionGuid; 1349 extern EFI_GUID gEfiCxlDramEventErrorSectionGuid; 1350 extern EFI_GUID gEfiCxlMemoryModuleErrorSectionGuid; 1351 extern EFI_GUID gEfiCxlPhysicalSwitchErrorSectionGuid; 1352 extern EFI_GUID gEfiCxlVirtualSwitchErrorSectionGuid; 1353 extern EFI_GUID gEfiCxlMldPortErrorSectionGuid; 1354 1355 #if defined(MDE_CPU_IA32) || defined(MDE_CPU_X64) 1356 /// 1357 /// IA32 and x64 Specific definitions. 1358 /// 1359 1360 extern EFI_GUID gEfiIa32X64ErrorTypeCacheCheckGuid; 1361 extern EFI_GUID gEfiIa32X64ErrorTypeTlbCheckGuid; 1362 extern EFI_GUID gEfiIa32X64ErrorTypeBusCheckGuid; 1363 extern EFI_GUID gEfiIa32X64ErrorTypeMsCheckGuid; 1364 1365 #endif 1366 1367 /// 1368 /// NVIDIA Error Record Section 1369 /// 1370 typedef struct { 1371 UINT32 ErrorCount; 1372 UINT32 ChannelEnabled : 1; 1373 UINT32 ChannelIsSpare : 1; 1374 UINT32 ChannelPermanentlyDisabled : 1; 1375 UINT32 DisabledReason : 2; 1376 UINT32 Reserved : 27; 1377 } EFI_NVIDIA_CMET_CHANNEL_INFO; 1378 1379 typedef struct { 1380 CHAR8 initiating_firmware[8]; 1381 UINT64 task_checkpoint; 1382 UINT64 mb1_error_code; 1383 CHAR8 mb1_version_string[8]; 1384 UINT64 bad_pages_retired_mask; 1385 UINT64 training_or_alias_check_retired_mask; 1386 UINT32 worst_bad_pages_channel_number; 1387 UINT32 worst_bad_pages_bad_page_count; 1388 UINT32 second_worst_bad_pages_channel_number; 1389 UINT32 second_worst_bad_pages_bad_page_count; 1390 UINT32 third_worst_bad_pages_channel_number; 1391 UINT32 third_worst_bad_pages_bad_page_count; 1392 UINT64 mss_aon_cfg_scratch_register_0; 1393 UINT64 scratch_dram_disable; 1394 } EFI_NVIDIA_FWERROR; 1395 1396 typedef struct { 1397 UINT64 Address; 1398 union { 1399 UINT64 Value; 1400 EFI_NVIDIA_CMET_CHANNEL_INFO CmetInfo; 1401 }; 1402 } EFI_NVIDIA_REGISTER_DATA; 1403 1404 typedef struct { 1405 CHAR8 Signature[16]; 1406 UINT16 ErrorType; 1407 UINT16 ErrorInstance; 1408 UINT8 Severity; 1409 UINT8 Socket; 1410 UINT8 NumberRegs; 1411 UINT8 Reserved; 1412 UINT64 InstanceBase; 1413 // Keep this at the end of this struct 1414 // and allocate based on NumberRegs 1415 #ifndef __cplusplus 1416 EFI_NVIDIA_REGISTER_DATA Register[] LIBCPER_CC_COUNTED_BY(NumberRegs); 1417 #endif 1418 } EFI_NVIDIA_ERROR_DATA; 1419 1420 extern EFI_GUID gEfiNvidiaErrorSectionGuid; 1421 1422 /// 1423 /// Ampere Error Record Section 1424 /// 1425 typedef struct { 1426 UINT16 TypeId; 1427 UINT16 SubtypeId; 1428 UINT32 InstanceId; 1429 } __attribute__((packed)) EFI_AMPERE_ERROR_DATA; 1430 1431 extern EFI_GUID gEfiAmpereErrorSectionGuid; 1432 1433 /// 1434 /// Arm Error Record Section 1435 /// 1436 typedef struct { 1437 UINT32 ValidFields; 1438 UINT16 ErrInfoNum; 1439 UINT16 ContextInfoNum; 1440 UINT32 SectionLength; 1441 UINT32 ErrorAffinityLevel; 1442 UINT64 MPIDR_EL1; 1443 UINT64 MIDR_EL1; 1444 UINT32 RunningState; 1445 UINT32 PsciState; 1446 } __attribute__((packed, aligned(1))) EFI_ARM_ERROR_RECORD; 1447 1448 /// 1449 /// ARM Processor Error Information Structure 1450 /// 1451 #define ARM_ERROR_INFORMATION_TYPE_CACHE 1 1452 #define ARM_ERROR_INFORMATION_TYPE_TLB 2 1453 #define ARM_ERROR_INFORMATION_TYPE_BUS 4 1454 #define ARM_ERROR_INFORMATION_TYPE_MICROARCH 8 1455 1456 typedef struct { 1457 UINT64 ValidationBits : 16; 1458 UINT64 TransactionType : 2; 1459 UINT64 Operation : 4; 1460 UINT64 Level : 3; 1461 UINT64 ProcessorContextCorrupt : 1; 1462 UINT64 Corrected : 1; 1463 UINT64 PrecisePC : 1; 1464 UINT64 RestartablePC : 1; 1465 UINT64 Reserved : 34; 1466 } EFI_ARM_CACHE_ERROR_STRUCTURE; 1467 1468 typedef struct { 1469 UINT64 ValidationBits : 16; 1470 UINT64 TransactionType : 2; 1471 UINT64 Operation : 4; 1472 UINT64 Level : 3; 1473 UINT64 ProcessorContextCorrupt : 1; 1474 UINT64 Corrected : 1; 1475 UINT64 PrecisePC : 1; 1476 UINT64 RestartablePC : 1; 1477 UINT64 Reserved : 34; 1478 } EFI_ARM_TLB_ERROR_STRUCTURE; 1479 1480 typedef struct { 1481 UINT64 ValidationBits : 16; 1482 UINT64 TransactionType : 2; 1483 UINT64 Operation : 4; 1484 UINT64 Level : 3; 1485 UINT64 ProcessorContextCorrupt : 1; 1486 UINT64 Corrected : 1; 1487 UINT64 PrecisePC : 1; 1488 UINT64 RestartablePC : 1; 1489 UINT64 ParticipationType : 2; 1490 UINT64 TimeOut : 1; 1491 UINT64 AddressSpace : 2; 1492 UINT64 MemoryAddressAttributes : 9; 1493 UINT64 AccessMode : 1; 1494 UINT64 Reserved : 20; 1495 } EFI_ARM_BUS_ERROR_STRUCTURE; 1496 1497 typedef union { 1498 UINT64 Value; 1499 EFI_ARM_CACHE_ERROR_STRUCTURE CacheError; 1500 EFI_ARM_TLB_ERROR_STRUCTURE TlbError; 1501 EFI_ARM_BUS_ERROR_STRUCTURE BusError; 1502 } EFI_ARM_ERROR_INFORMATION_STRUCTURE; 1503 1504 typedef struct { 1505 UINT8 Version; 1506 UINT8 Length; 1507 UINT16 ValidationBits; 1508 UINT8 Type; 1509 UINT16 MultipleError; 1510 UINT8 Flags; 1511 EFI_ARM_ERROR_INFORMATION_STRUCTURE ErrorInformation; 1512 UINT64 VirtualFaultAddress; 1513 UINT64 PhysicalFaultAddress; 1514 } __attribute__((packed, aligned(1))) EFI_ARM_ERROR_INFORMATION_ENTRY; 1515 1516 /// 1517 /// ARM Processor Context Information Structure 1518 /// 1519 typedef struct { 1520 UINT16 Version; 1521 UINT16 RegisterContextType; 1522 UINT32 RegisterArraySize; 1523 } __attribute__((packed, aligned(1))) EFI_ARM_CONTEXT_INFORMATION_HEADER; 1524 1525 /// 1526 /// ARM Processor Context Register Types 1527 /// 1528 #define EFI_ARM_CONTEXT_TYPE_AARCH32_GPR 0 1529 #define EFI_ARM_CONTEXT_TYPE_AARCH32_EL1 1 1530 #define EFI_ARM_CONTEXT_TYPE_AARCH32_EL2 2 1531 #define EFI_ARM_CONTEXT_TYPE_AARCH32_SECURE 3 1532 #define EFI_ARM_CONTEXT_TYPE_AARCH64_GPR 4 1533 #define EFI_ARM_CONTEXT_TYPE_AARCH64_EL1 5 1534 #define EFI_ARM_CONTEXT_TYPE_AARCH64_EL2 6 1535 #define EFI_ARM_CONTEXT_TYPE_AARCH64_EL3 7 1536 #define EFI_ARM_CONTEXT_TYPE_MISC 8 1537 1538 typedef struct { 1539 UINT32 R0; 1540 UINT32 R1; 1541 UINT32 R2; 1542 UINT32 R3; 1543 UINT32 R4; 1544 UINT32 R5; 1545 UINT32 R6; 1546 UINT32 R7; 1547 UINT32 R8; 1548 UINT32 R9; 1549 UINT32 R10; 1550 UINT32 R11; 1551 UINT32 R12; 1552 UINT32 R13_sp; 1553 UINT32 R14_lr; 1554 UINT32 R15_pc; 1555 } EFI_ARM_V8_AARCH32_GPR; 1556 1557 typedef struct { 1558 UINT32 Dfar; 1559 UINT32 Dfsr; 1560 UINT32 Ifar; 1561 UINT32 Isr; 1562 UINT32 Mair0; 1563 UINT32 Mair1; 1564 UINT32 Midr; 1565 UINT32 Mpidr; 1566 UINT32 Nmrr; 1567 UINT32 Prrr; 1568 UINT32 Sctlr_Ns; 1569 UINT32 Spsr; 1570 UINT32 Spsr_Abt; 1571 UINT32 Spsr_Fiq; 1572 UINT32 Spsr_Irq; 1573 UINT32 Spsr_Svc; 1574 UINT32 Spsr_Und; 1575 UINT32 Tpidrprw; 1576 UINT32 Tpidruro; 1577 UINT32 Tpidrurw; 1578 UINT32 Ttbcr; 1579 UINT32 Ttbr0; 1580 UINT32 Ttbr1; 1581 UINT32 Dacr; 1582 } EFI_ARM_AARCH32_EL1_CONTEXT_REGISTERS; 1583 1584 typedef struct { 1585 UINT32 Elr_Hyp; 1586 UINT32 Hamair0; 1587 UINT32 Hamair1; 1588 UINT32 Hcr; 1589 UINT32 Hcr2; 1590 UINT32 Hdfar; 1591 UINT32 Hifar; 1592 UINT32 Hpfar; 1593 UINT32 Hsr; 1594 UINT32 Htcr; 1595 UINT32 Htpidr; 1596 UINT32 Httbr; 1597 UINT32 Spsr_Hyp; 1598 UINT32 Vtcr; 1599 UINT32 Vttbr; 1600 UINT32 Dacr32_El2; 1601 } EFI_ARM_AARCH32_EL2_CONTEXT_REGISTERS; 1602 1603 typedef struct { 1604 UINT32 Sctlr_S; 1605 UINT32 Spsr_Mon; 1606 } EFI_ARM_AARCH32_SECURE_CONTEXT_REGISTERS; 1607 1608 typedef struct { 1609 UINT64 X0; 1610 UINT64 X1; 1611 UINT64 X2; 1612 UINT64 X3; 1613 UINT64 X4; 1614 UINT64 X5; 1615 UINT64 X6; 1616 UINT64 X7; 1617 UINT64 X8; 1618 UINT64 X9; 1619 UINT64 X10; 1620 UINT64 X11; 1621 UINT64 X12; 1622 UINT64 X13; 1623 UINT64 X14; 1624 UINT64 X15; 1625 UINT64 X16; 1626 UINT64 X17; 1627 UINT64 X18; 1628 UINT64 X19; 1629 UINT64 X20; 1630 UINT64 X21; 1631 UINT64 X22; 1632 UINT64 X23; 1633 UINT64 X24; 1634 UINT64 X25; 1635 UINT64 X26; 1636 UINT64 X27; 1637 UINT64 X28; 1638 UINT64 X29; 1639 UINT64 X30; 1640 UINT64 Sp; 1641 } EFI_ARM_V8_AARCH64_GPR; 1642 1643 typedef struct { 1644 UINT64 Elr_El1; 1645 UINT64 Esr_El1; 1646 UINT64 Far_El1; 1647 UINT64 Isr_El1; 1648 UINT64 Mair_El1; 1649 UINT64 Midr_El1; 1650 UINT64 Mpidr_El1; 1651 UINT64 Sctlr_El1; 1652 UINT64 Sp_El0; 1653 UINT64 Sp_El1; 1654 UINT64 Spsr_El1; 1655 UINT64 Tcr_El1; 1656 UINT64 Tpidr_El0; 1657 UINT64 Tpidr_El1; 1658 UINT64 Tpidrro_El0; 1659 UINT64 Ttbr0_El1; 1660 UINT64 Ttbr1_El1; 1661 } EFI_ARM_AARCH64_EL1_CONTEXT_REGISTERS; 1662 1663 typedef struct { 1664 UINT64 Elr_El2; 1665 UINT64 Esr_El2; 1666 UINT64 Far_El2; 1667 UINT64 Hacr_El2; 1668 UINT64 Hcr_El2; 1669 UINT64 Hpfar_El2; 1670 UINT64 Mair_El2; 1671 UINT64 Sctlr_El2; 1672 UINT64 Sp_El2; 1673 UINT64 Spsr_El2; 1674 UINT64 Tcr_El2; 1675 UINT64 Tpidr_El2; 1676 UINT64 Ttbr0_El2; 1677 UINT64 Vtcr_El2; 1678 UINT64 Vttbr_El2; 1679 } EFI_ARM_AARCH64_EL2_CONTEXT_REGISTERS; 1680 1681 typedef struct { 1682 UINT64 Elr_El3; 1683 UINT64 Esr_El3; 1684 UINT64 Far_El3; 1685 UINT64 Mair_El3; 1686 UINT64 Sctlr_El3; 1687 UINT64 Sp_El3; 1688 UINT64 Spsr_El3; 1689 UINT64 Tcr_El3; 1690 UINT64 Tpidr_El3; 1691 UINT64 Ttbr0_El3; 1692 } EFI_ARM_AARCH64_EL3_CONTEXT_REGISTERS; 1693 1694 typedef struct { 1695 UINT64 MrsOp2 : 3; 1696 UINT64 MrsCrm : 4; 1697 UINT64 MrsCrn : 4; 1698 UINT64 MrsOp1 : 3; 1699 UINT64 MrsO0 : 2; 1700 UINT64 Value : 64; 1701 } EFI_ARM_MISC_CONTEXT_REGISTER; 1702 1703 /// 1704 /// See: https://developer.arm.com/documentation/den0085/latest/ 1705 /// ARM RAS System Architecture Node (Revision 1 - Table 20) 1706 /// 1707 typedef struct { 1708 UINT32 Revision; /* Must be 1 for Rev1 */ 1709 UINT8 ComponentType; /* AEST Node Type (legacy from Rev1 onward) */ 1710 UINT8 Reserved0; /* Reserved, must be 0 */ 1711 UINT8 Reserved1; /* Reserved, must be 0 */ 1712 UINT8 Reserved2; /* Reserved, must be 0 */ 1713 UINT32 ErrorSyndromeArrayNumEntries; /* N: number of descriptors (Table 21) */ 1714 /* err_arr_off: offset to error syndrome array */ 1715 UINT16 ErrorSyndromeArrayOffset; 1716 UINT16 AuxiliaryDataOffset; /* aux_off: offset to auxiliary data block*/ 1717 UINT8 IPInstanceFormat; /* IP_instance_format (0..3) */ 1718 UINT8 IPTypeFormat; /* IP_type_format (0..3, 255 invalid) */ 1719 UINT8 Reserved3; /* Reserved, must be 0 */ 1720 UINT8 Reserved4; /* Reserved, must be 0 */ 1721 UINT8 Reserved5; /* Reserved, must be 0 */ 1722 UINT8 Reserved6; /* Reserved, must be 0 */ 1723 UINT8 Reserved7; /* Reserved, must be 0 */ 1724 UINT8 Reserved8; /* Reserved, must be 0 */ 1725 union { 1726 struct { 1727 UINT64 MPIDR_EL1; 1728 UINT64 Reserved; 1729 } pe; 1730 struct { 1731 UINT64 SystemPhysicalAddress; 1732 UINT64 Reserved; 1733 } systemPhysicalAddress; 1734 struct { 1735 UINT64 SocSpecificLocalAddressSpace; 1736 UINT64 BaseAddress; 1737 } localAddressIdentifier; 1738 struct { 1739 UINT8 SocSpecificIPIdentifier[16]; 1740 } socSpecificIpIdentifier; 1741 } IPInstance; 1742 union { 1743 struct { 1744 UINT64 MIDR_EL1; 1745 UINT64 REVIDR_EL1; 1746 UINT64 AIDR_EL1; 1747 } smmuIidr; 1748 struct { 1749 UINT32 IIDR; 1750 UINT32 AIDR; 1751 UINT64 Reserved1; 1752 UINT64 Reserved2; 1753 } gicIidr; 1754 struct { 1755 UINT8 PIDR3; 1756 UINT8 PIDR2; 1757 UINT8 PIDR1; 1758 UINT8 PIDR0; 1759 UINT8 PIDR7; 1760 UINT8 PIDR6; 1761 UINT8 PIDR5; 1762 UINT8 PIDR4; 1763 UINT64 Reserved1; 1764 UINT64 Reserved2; 1765 } pidr; 1766 } IPType; 1767 CHAR8 UserData[16]; /* Null-terminated implementation-defined string */ 1768 } EFI_ARM_RAS_NODE; 1769 1770 /// 1771 /// ARM RAS Error Record Descriptor (Revision 1 - Table 21) 1772 /// 1773 typedef struct { 1774 UINT32 ErrorRecordIndex; 1775 UINT8 RasExtensionRevision; /* High nibble: REVISION, Low nibble: ARCHVER */ 1776 UINT8 Reserved[3]; 1777 UINT64 ERR_FR; /* Functional register */ 1778 UINT64 ERR_CTLR; /* Control register */ 1779 UINT64 ERR_STATUS; /* Status register */ 1780 UINT64 ERR_ADDR; /* Address register */ 1781 UINT64 ERR_MISC0; /* Misc register 0 */ 1782 UINT64 ERR_MISC1; /* Misc register 1 */ 1783 UINT64 ERR_MISC2; /* Misc register 2 (valid if RasExtensionRevision != 0) */ 1784 UINT64 ERR_MISC3; /* Misc register 3 (valid if RasExtensionRevision != 0) */ 1785 } EFI_ARM_RAS_ERROR_RECORD_DESCRIPTOR; 1786 1787 /* 1788 * ARM RAS Auxiliary Data Structures (Revision 1 - Tables 22-26) 1789 * All structures are packed. Offsets are relative to the start of the 1790 * auxiliary data block (i.e. the byte at AuxiliaryDataOffset inside the 1791 * Arm RAS Section). 1792 */ 1793 typedef struct { 1794 UINT8 Version; /* Must be 1 */ 1795 UINT8 Reserved0; /* Must be 0 */ 1796 UINT16 AddressSpaceArrayEntryCount; /* N: number of Auxiliary Context headers */ 1797 UINT32 AuxiliaryDataSize; /* Total size in bytes including this header */ 1798 UINT32 KeyValuePairArrayOffset; /* kvp_off: offset (from aux start) to key_val_pair_array */ 1799 UINT16 KeyValuePairArrayEntryCount; /* K: number of key/value entries */ 1800 UINT16 Reserved1; /* Must be 0 */ 1801 } EFI_ARM_RAS_AUX_DATA_HEADER; 1802 1803 typedef struct { 1804 UINT32 Length; /* Total length including header + register entries */ 1805 /* Bit0: 0=System physical (global); 1=Local address space */ 1806 UINT8 AddressSpaceIdentifierScope : 1; 1807 UINT8 Reserved : 7; 1808 UINT8 Reserved0; /* Must be 0 */ 1809 UINT16 RegisterArrayEntryCount; /* R: number of register entries */ 1810 UINT16 AddressSpaceIdentifier; /* Valid only if Flags bit0==1, else must be 0 */ 1811 UINT8 Reserved1[6]; /* Must be 0 */ 1812 } EFI_ARM_RAS_AUX_CONTEXT_HEADER; 1813 1814 typedef struct { 1815 UINT64 RegisterAddress; /* Memory mapped register address */ 1816 UINT64 RegisterValue; /* Register value (upper bits must be zero if reg <64b) */ 1817 } EFI_ARM_RAS_AUX_MM_REG_ENTRY; 1818 1819 typedef struct { 1820 EFI_GUID Key; /* UUID describing the value */ 1821 UINT64 Value; /* Key-specific value */ 1822 } EFI_ARM_RAS_AUX_KEY_VALUE_PAIR; 1823 1824 /* Known Key Value Pair UUIDs (Table 26) */ 1825 /* ebb45182-fb03-4bf9-9aca-8613709fd789 */ 1826 static const EFI_GUID EFI_ARM_RAS_KVP_UUID_MPAM_PARTID = { 1827 0xEBB45182, 1828 0xFB03, 1829 0x4BF9, 1830 { 0x9A, 0xCA, 0x86, 0x13, 0x70, 0x9F, 0xD7, 0x89 } 1831 }; 1832 #pragma pack(pop) 1833 1834 #ifdef __cplusplus 1835 } 1836 #endif 1837 1838 #endif 1839