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Searched refs:C_STATE_LATENCY_CONTROL_5_LIMIT (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/x86/include/asm/arch-broadwell/
H A Dcpu.h43 #define C_STATE_LATENCY_CONTROL_5_LIMIT 0x1ef macro
/openbmc/u-boot/arch/x86/cpu/broadwell/
H A Dcpu.c540 msr.lo = IRTL_VALID | IRTL_1024_NS | C_STATE_LATENCY_CONTROL_5_LIMIT; in configure_c_states()