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Searched refs:CVMX_CIU_PP_RST (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/mips/cavium-octeon/
H A Dsmp.c339 cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid); in octeon_cpu_die()
340 cvmx_write_csr(CVMX_CIU_PP_RST, 0); in octeon_cpu_die()
388 cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid); in octeon_update_boot_vector()
389 cvmx_write_csr(CVMX_CIU_PP_RST, 0); in octeon_update_boot_vector()
/openbmc/linux/arch/mips/include/asm/octeon/
H A Dcvmx-ciu-defs.h32 #define CVMX_CIU_PP_RST CVMX_CIU_ADDR(0x0700, 0, 0x00, 0) macro