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Searched refs:CSR_VSTVEC (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h294 #define CSR_VSTVEC 0x205 macro
H A Dcpu.c552 CSR_VSTVEC, in riscv_cpu_dump_state()
H A Dcsr.c5181 qemu_log_mask(LOG_UNIMP, "CSR_VSTVEC: reserved mode not supported\n"); in write_vstvec()
6103 [CSR_VSTVEC] = { "vstvec", hmode, read_vstvec, write_vstvec,