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Searched refs:CSR_VSTIMECMP (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/arch/riscv/kvm/
H A Dvcpu_timer.c75 csr_write(CSR_VSTIMECMP, ncycles & 0xFFFFFFFF); in kvm_riscv_vcpu_update_vstimecmp()
78 csr_write(CSR_VSTIMECMP, ncycles); in kvm_riscv_vcpu_update_vstimecmp()
309 csr_write(CSR_VSTIMECMP, (u32)t->next_cycles); in kvm_riscv_vcpu_timer_restore()
312 csr_write(CSR_VSTIMECMP, t->next_cycles); in kvm_riscv_vcpu_timer_restore()
330 t->next_cycles = csr_read(CSR_VSTIMECMP); in kvm_riscv_vcpu_timer_sync()
333 t->next_cycles = csr_read(CSR_VSTIMECMP); in kvm_riscv_vcpu_timer_sync()
/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h309 #define CSR_VSTIMECMP 0x24D macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h275 #define CSR_VSTIMECMP 0x24D macro
H A Dcsr.c465 if ((csrno == CSR_VSTIMECMP) || (csrno == CSR_VSTIMECMPH)) { in sstc()
5176 [CSR_VSTIMECMP] = { "vstimecmp", sstc, read_vstimecmp,