Home
last modified time | relevance | path

Searched refs:CSR_VCSR (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/arch/riscv/include/asm/
H A Dvector.h72 "csrr %3, " __stringify(CSR_VCSR) "\n\t" in __vstate_csr_save()
86 "csrw " __stringify(CSR_VCSR) ", %3\n\t" in __vstate_csr_restore()
H A Dcsr.h392 #define CSR_VCSR 0xf macro
/openbmc/linux/arch/riscv/kernel/
H A Dvector.c75 if ((csr >= CSR_VSTART && csr <= CSR_VCSR) || in insn_is_vector()
H A Dhead.S451 csrs CSR_VCSR, x0
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h61 #define CSR_VCSR 0x00f macro
H A Dcpu.c849 CSR_VCSR, in riscv_cpu_dump_state()
H A Dcsr.c5000 [CSR_VCSR] = { "vcsr", vs, read_vcsr, write_vcsr },