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Searched refs:CSR_PMPCFG2 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h231 #define CSR_PMPCFG2 0x3a2 macro
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h373 #define CSR_PMPCFG2 0x3a2 macro
H A Dcsr.c6171 [CSR_PMPCFG2] = { "pmpcfg2", pmp, read_pmpcfg, write_pmpcfg },