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Searched refs:CSR_PMPCFG0 (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h229 #define CSR_PMPCFG0 0x3a0 macro
/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h365 #define CSR_PMPCFG0 0x3a0 macro
/openbmc/linux/arch/riscv/kernel/
H A Dhead.S220 csrw CSR_PMPCFG0, a0
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h335 #define CSR_PMPCFG0 0x3a0 macro
H A Dcsr.c571 uint32_t reg_index = csrno - CSR_PMPCFG0; in pmp()
4256 uint32_t reg_index = csrno - CSR_PMPCFG0; in read_pmpcfg()
4265 uint32_t reg_index = csrno - CSR_PMPCFG0; in write_pmpcfg()
5295 [CSR_PMPCFG0] = { "pmpcfg0", pmp, read_pmpcfg, write_pmpcfg },